Clock-related functions implemented on all MSP430 MCUs. More...

#include <bsp430/core.h>

Macros
#define	BSP430_PERIPH_CS_IS_CSA (defined(__MSP430_HAS_CS_A__) \|\| (defined(__MSP430_HAS_CS__) && defined(DCOFSEL2)))

#define	BSP430_PERIPH_CS_IS_CS4 (defined(__MSP430_HAS_CS__) && defined(SELA))

#define	BSP430_CLOCK_NOMINAL_MCLK_HZ 7948800UL

#define	BSP430_CLOCK_US_TO_NOMINAL_MCLK(delay_us_) BSP430_CORE_US_TO_TICKS((delay_us_), BSP430_CLOCK_NOMINAL_MCLK_HZ)

#define	BSP430_CLOCK_LFXT1_XCAP include <bsp430/platform.h>

#define	BSP430_CLOCK_IS_FAULTED_NI() peripheral specific

#define	BSP430_CLOCK_FAULT_RECHECK_DELAY_US 50

#define	BSP430_CLOCK_CLEAR_FAULTS_NI() peripheral specific

#define	BSP430_CLOCK_OSC_IS_FAULTED_NI() (IFG1 & OFIFG)

#define	BSP430_CLOCK_OSC_CLEAR_FAULT_NI() do { IFG1 &= ~OFIFG; } while (0)

#define	BSP430_CLOCK_LFXT1_IS_FAULTED_NI() peripheral specific

#define	BSP430_CLOCK_XT2_IS_FAULTED_NI() (1)

#define	BSP430_CLOCK_LFXT1_STABILIZATION_DELAY_CYCLES BSP430_CORE_MS_TO_TICKS(50, BSP430_CLOCK_PUC_MCLK_HZ)

#define	BSP430_CLOCK_XT2_STABILIZATION_DELAY_CYCLES (20000UL)

#define	BSP430_CLOCK_XT2_IS_FAULTED_NI() peripheral specific

#define	BSP430_CLOCK_NOMINAL_XT1CLK_HZ 32768U

#define	BSP430_CLOCK_NOMINAL_MODCLK_HZ peripheral specific

#define	BSP430_CLOCK_NOMINAL_XT2CLK_HZ include <bsp430/platform.h>

#define	BSP430_CLOCK_NOMINAL_VLOCLK_HZ platform specific around 10-12 kHz

#define	BSP430_CLOCK_PUC_MCLK_HZ platform specific around 1 MHz

Typedefs
typedef enum eBSP430clockSource	eBSP430clockSource

Functions
static BSP430_CORE_INLINE int	iBSP430clockSourceSynchronous (eBSP430clockSource s1, eBSP430clockSource s2)

eBSP430clockSource	xBSP430clockACLKSource ()

eBSP430clockSource	xBSP430clockSMCLKSource ()

eBSP430clockSource	xBSP430clockMCLKSource ()

unsigned long	ulBSP430clockConfigureMCLK_ni (unsigned long mclk_Hz)

unsigned long	ulBSP430clockMCLK_Hz_ni (void)

static BSP430_CORE_INLINE unsigned long	ulBSP430clockMCLK_Hz (void)

int	iBSP430clockConfigureSMCLK_ni (eBSP430clockSource sel, unsigned int dividing_shift)

unsigned long	ulBSP430clockSMCLK_Hz_ni (void)

static BSP430_CORE_INLINE unsigned long	ulBSP430clockSMCLK_Hz (void)

int	iBSP430clockConfigureLFXT1_ni (int enablep, int loop_limit)

int	iBSP430clockConfigureXT2_ni (int enablep, int loop_limit)

int	iBSP430clockConfigureACLK_ni (eBSP430clockSource sel, unsigned int dividing_shift)

unsigned long	ulBSP430clockACLK_Hz_ni (void)

static BSP430_CORE_INLINE unsigned long	ulBSP430clockACLK_Hz (void)

static BSP430_CORE_INLINE unsigned int	uiBSP430clockACLK_Hz_ni (void)

static BSP430_CORE_INLINE unsigned int	uiBSP430clockACLK_Hz (void)

Detailed Description

Clock-related functions implemented on all MSP430 MCUs.

This module declares functions and macros of general use in managing MSP430 clocks. The interface here is independent of the underlying clock peripheral, but in some cases behavior is refined or clarified in the peripheral-specific header.

This module will include the peripheral-specific header if a functional presence preprocessor symbol is available that is recognized as a supported clock peripheral. Recognized peripherals and the corresponding BSP430 header are:

<bsp430/periph/bc2.h> for BC2 (Basic Clock Module+)
<bsp430/periph/fllplus.h> for FLLPLUS and FLLPLUS_SMALL (FLL Plus)
<bsp430/periph/ucs.h> for UCS and UCS_RF (Unified Clock System)
<bsp430/periph/cs.h> for CS and CS_A (Clock System) on FR5xx devices
<bsp430/periph/cs4.h> for CS (Clock System) on FR4xx/2xx devices

Note: Some modules (such as BC2) use LFXT1 to denote the source for ACLK regardless of whether that is the external crystal or VLOCLK. Throughout BSP430 the term LFXT1 is exclusively used to denote an external low-frequency crystal.; The CS_A module uses HFXT to refer to XT2. BSP430 uniformly uses XT2.

Homepage: http://github.com/pabigot/bsp430

Copyright: Copyright 2012-2014, Peter A. Bigot. Licensed under BSD-3-Clause

Macro Definition Documentation

#define BSP430_CLOCK_CLEAR_FAULTS_NI ( ) peripheral specific

Clear faults associated with clocks

This clears the state bits associated with fault in all clock systems supported by the peripheral. If a clock still exhibits a fault condition, the bits will be set again automatically, though perhaps not immediately.

Note: Faults are cleared on peripheral-specific registers as well as the system oscillator fault flag.

Warning: If the underlying peripheral requires that its register bank be unlocked for modification, this macro will do so then re-lock them. This will result in unexpected behavior if the macro is invoked in a context where the registers are already unlocked.

See also: BSP430_CLOCK_IS_FAULTED_NI(), BSP430_CLOCK_FAULT_RECHECK_DELAY_US

Defaulted:: The value here is superseded by previously encountered definitions.

Platform-Specific Value:: The value here is an example, and may differ from the actual value used depending on platform information.

#define BSP430_CLOCK_FAULT_RECHECK_DELAY_US 50

The delay after clearing clock faults before recurrent faults are expected.

When a clock fault is cleared, the clock peripheral will automatically set the fault indicator again if the clock is still faulted. However there is no evidence in the documentation that this is done instantly. BSP430 infrastructure code will delay this many microseconds after clearing faults before checking to see whether they are still present.

Delay suggested by SLAU144I "2xx Family Users Guide" section 5.2.7.1 "Sourcing MCLK from a Crystal". This applies to using XT2 and for a specific MCU family, but we're guessing it's a sufficient delay to detect faults in other configurations. For DCO faults it's probably too long.

Defaulted:: The value here is superseded by previously encountered definitions.

#define BSP430_CLOCK_IS_FAULTED_NI ( ) peripheral specific

Check whether any clock has a fault condition.

This checks all available clocks on the system. Use peripheral-specific checks for specific clocks.

See also: BSP430_CLOCK_CLEAR_FAULTS_NI()

Defaulted:: The value here is superseded by previously encountered definitions.

Platform-Specific Value:: The value here is an example, and may differ from the actual value used depending on platform information.

#define BSP430_CLOCK_LFXT1_IS_FAULTED_NI ( ) peripheral specific

Check whether the LFXT1 crystal has a fault condition.

The implementation of this is specific to the clock peripheral.

Defaulted:: The value here is superseded by previously encountered definitions.

Platform-Specific Value:: The value here is an example, and may differ from the actual value used depending on platform information.

Examples:: bootstrap/applpm/main.c, and bootstrap/clocks/main.c.

#define BSP430_CLOCK_LFXT1_STABILIZATION_DELAY_CYCLES BSP430_CORE_MS_TO_TICKS(50, BSP430_CLOCK_PUC_MCLK_HZ)

Define this to the number of MCLK cycles that iBSP430clockConfigureLFXT1_ni should delay, after clearing oscillator faults, before checking for oscillator stability. This must be a compile-time constant integer compatible with unsigned long.

Crystal stabilization can take hundreds of milliseconds. If this value is too short, iBSP430clockConfigureLFXT1_ni may prematurely decide that the crystal is working; if it is too long, the return from iBSP430clockConfigureLFXT1_ni is delayed.

The default value is chosen to reflect a 50msec delay at the PUC MCLK frequency of roughly 1MHz. This allows BSP430_CORE_WATCHDOG_CLEAR() to be invoked within the loop to prevent a watchdog reset while waiting for stabilization. It does assume that an unstable crystal will indicate a fault within this period, which may not be true.

Defaulted:: The value here is superseded by previously encountered definitions.

Platform-Specific Value:: The value here is an example, and may differ from the actual value used depending on platform information.

Examples:: bootstrap/clocks/main.c.

#define BSP430_CLOCK_LFXT1_XCAP include <bsp430/platform.h>

Oscillator capacitor setting for use by iBSP430clockConfigureLFXT1_ni.

Most MSP430 clock systems allow control of internal capacitors for the low-frequency crystal. The specific setting is platform-dependent; the value for the setting is peripheral-dependent. A default value is provided in each peripheral header.

The value of this macro should be the bits that need to be set in the peripheral-specific register to control capacitance, normally in the form of a header constant such as XCAP_1 or XCAP10PF.

Defaulted:: The value here is superseded by previously encountered definitions.

Platform-Based Value:: Undefined here; include <bsp430/platform.h> to obtain the correct value of this macro.

#define BSP430_CLOCK_NOMINAL_MCLK_HZ 7948800UL

A constant representing the desired clock speed of the master clock.

If BSP430_PLATFORM_BOOT_CONFIGURE_CLOCKS is true, vBSP430platformInitialize_ni() will use this value to initialize the system clocks. The value should not be used after this point, as ulBSP430clockMCLK_Hz_ni() is more likely to reflect the actual MCLK rate.

Note: The default value is calculated from 3*3*5*5*512*69=115200*69, and is the value nearest 8MHz which is also compatible with as many serial baud rates as possible.; Applications may wish to provide an alternative value suited to specific needs. It is suggested that the value include the suffix L in case the compiler does not automatically promote constants as necessary.

Defaulted:: The value here is superseded by previously encountered definitions.

Examples:: bootstrap/blink/main.c, bootstrap/clocks/main.c, bootstrap/console/main.c, rf/cc110x/main.c, rf/cc3000/cli/main.c, sensors/ds18b20/main.c, sensors/tmp102/main.c, utility/m25p/main.c, and utility/u8glib/main.c.

#define BSP430_CLOCK_NOMINAL_MODCLK_HZ peripheral specific

Nominal rate of MODCLK.

MODCLK is an internally-generated high frequency clock source available with certain clock systems (UCS, CS_A, and CS4). The supporting peripheral header will define this if the feature is available, and leave it undefined otherwise.

Defaulted:: The value here is superseded by previously encountered definitions.

Platform-Specific Value:: The value here is an example, and may differ from the actual value used depending on platform information.

#define BSP430_CLOCK_NOMINAL_VLOCLK_HZ platform specific around 10-12 kHz

Nominal frequency of VLOCLK, in Hz.

The value is constant for all platforms using a specific clock peripheral, and is defined in the peripheral header. It is usually in the range of 10-12 kHz, but is highly sensitive to temperature and voltage. The actual value may be off by as much as 20%, making the clock relatively useless for anything that requires accuracy (such as serial baud rates).

Defaulted:: The value here is superseded by previously encountered definitions.

Examples:: bootstrap/clocks/main.c.

#define BSP430_CLOCK_NOMINAL_XT1CLK_HZ 32768U

Nominal rate of the external low-frequency crystal.

This is expected to be a 32 KiHz watch crystal, so that's what the default is.

Defaulted:: The value here is superseded by previously encountered definitions.

Examples:: bootstrap/clocks/main.c.

#define BSP430_CLOCK_NOMINAL_XT2CLK_HZ include <bsp430/platform.h>

Nominal rate of a secondary external clock (or crystal), in Hz.

This must be defined externally if eBSP430clockSRC_XT2CLK is to be used. Normally this would be done in the platform-specified header obtained through <bsp430/platform.h>.

If the platform does not support a secondary external clock, or it is normally left unpopulated, this macro will be undefined.

Defaulted:: The value here is superseded by previously encountered definitions.

Platform-Based Value:: Undefined here; include <bsp430/platform.h> to obtain the correct value of this macro.

Examples:: bootstrap/clocks/main.c.

#define BSP430_CLOCK_OSC_CLEAR_FAULT_NI ( ) do { IFG1 &= ~OFIFG; } while (0)

Clear the system oscillator fault flag.

This clears the bit the special function register which reflects roll-up oscillator faults throughout the system.

Platform-Specific Value:: The value here is an example, and may differ from the actual value used depending on platform information.

#define BSP430_CLOCK_OSC_IS_FAULTED_NI ( ) (IFG1 & OFIFG)

Check whether the system oscillator fault flag is set.

This checks the special function register which reflects roll-up oscillator faults throughout the system.

Platform-Specific Value:: The value here is an example, and may differ from the actual value used depending on platform information.

#define BSP430_CLOCK_PUC_MCLK_HZ platform specific around 1 MHz

Nominal frequency of MCLK at power-up, in Hz.

The value is constant for all platforms using a specific clock peripheral, and is defined in the peripheral header. It is usually around 1 MHz.

Examples:: bootstrap/clocks/main.c, and bootstrap/lpm/main.c.

#define BSP430_CLOCK_US_TO_NOMINAL_MCLK ( delay_us_ ) BSP430_CORE_US_TO_TICKS((delay_us_), BSP430_CLOCK_NOMINAL_MCLK_HZ)

A function macro that converts a value specified in microseconds to an approximate duration counted in MCLK cycles.

This is primarily used to provide the parameter to BSP430_CORE_DELAY_CYCLES when the desired delay is specified by time rather than cycles.

Parameters

delay_us_ the delay in microseconds. Expected, but not required, to be a compile-time integer constant compatible with unsigned long.

Warning: If BSP430_CLOCK_NOMINAL_MCLK_HZ or delay_us_ is large, it may be necessary to cast the delay_us_ to unsigned long long to avoid integer overflow.

#define BSP430_CLOCK_XT2_IS_FAULTED_NI ( ) (1)

Same as BSP430_CLOCK_LFXT1_IS_FAULTED_NI() but checks XT2.

XT2 is considered to be permanently faulted for clock peripherals and MCUs on which XT2 is not supported.

Check whether the XT2 crystal has a fault condition.

The implementation of this is specific to the clock peripheral.

Defaulted:: The value here is superseded by previously encountered definitions.

Platform-Specific Value:: The value here is an example, and may differ from the actual value used depending on platform information.

Examples:: bootstrap/clocks/main.c.

#define BSP430_CLOCK_XT2_IS_FAULTED_NI ( ) peripheral specific

Same as BSP430_CLOCK_LFXT1_IS_FAULTED_NI() but checks XT2.

XT2 is considered to be permanently faulted for clock peripherals and MCUs on which XT2 is not supported.

Check whether the XT2 crystal has a fault condition.

The implementation of this is specific to the clock peripheral.

Defaulted:: The value here is superseded by previously encountered definitions.

Platform-Specific Value:: The value here is an example, and may differ from the actual value used depending on platform information.

#define BSP430_CLOCK_XT2_STABILIZATION_DELAY_CYCLES (20000UL)

Same as BSP430_CLOCK_LFXT1_STABILIZATION_DELAY_CYCLES except applies to XT2.

Defaulted:: The value here is superseded by previously encountered definitions.

#define BSP430_PERIPH_CS_IS_CS4 (defined(__MSP430_HAS_CS__) && defined(SELA))

Identify use of the CS peripheral on FR4xx/2xx devices.

TI fails to distinguish the three types of CS module in the three FRAM families. The one on the FR4xx/2xx is so different it shares nothing but the module name. Empirically they can be distinguished because the FR4xx/2xx version has a single-bit SELA field.

Defaulted:: The value here is superseded by previously encountered definitions.

C Preprocessor Only:: This macro may have a value that restricts its use to C preprocessor conditional directives.

#define BSP430_PERIPH_CS_IS_CSA (defined(__MSP430_HAS_CS_A__) || (defined(__MSP430_HAS_CS__) && defined(DCOFSEL2)))

Identify use of the CS peripheral on FR58xx devices.

TI fails to distinguish the three types of CS module in the three FRAM families. The original one on the FR57xx is slightly different from the one on the FR58xx family (which was originally identified by TI as CS_A). Empirically CS_A can be distinguished by more bits in the DCOFSEL field.

Defaulted:: The value here is superseded by previously encountered definitions.

C Preprocessor Only:: This macro may have a value that restricts its use to C preprocessor conditional directives.

Typedef Documentation

typedef enum eBSP430clockSource eBSP430clockSource

Constants used for MCU-independent specification of clocks.

Use these instead of peripheral-specific values like SELA_1 or LFXT1S_2 to identify clock sources by their function. This also permits finer control within iBSP430clockConfigureACLK_ni(), allowing that to select a secondary source given oscillator faults in the primary source.

Enumeration Type Documentation

enum eBSP430clockSource

Constants used for MCU-independent specification of clocks.

Use these instead of peripheral-specific values like SELA_1 or LFXT1S_2 to identify clock sources by their function. This also permits finer control within iBSP430clockConfigureACLK_ni(), allowing that to select a secondary source given oscillator faults in the primary source.

Enumerator
eBSP430clockSRC_NONE	A marker value indicating that no clock is selected. Generally this is not an appropriate value to use as a parameter.
eBSP430clockSRC_XT1CLK	XT1 is the primary external clock. It is generally a low-frequency watch crystal running at 32 KiHz. The nominal speed for this clock is BSP430_CLOCK_NOMINAL_XT1CLK_HZ.
eBSP430clockSRC_VLOCLK	VLOCLK is a low-speed internal clock, normally around 10-12 kHz. It is relatively imprecise. The nominal speed for this clock is BSP430_CLOCK_NOMINAL_VLOCLK_HZ.
eBSP430clockSRC_REFOCLK	REFOCLK is an internally low power trimmed 32 KiHz oscillator supported in the UCS peripheral
eBSP430clockSRC_DCOCLK	DCOCLK is whatever the DCO clock frequency is. It's probably related to BSP430_CLOCK_NOMINAL_MCLK_HZ, but may be a multiple of that.
eBSP430clockSRC_DCOCLKDIV	DCOCLKDIV is a divided DCO clock. It's probably BSP430_CLOCK_NOMINAL_MCLK_HZ, but may be a multiple of that.
eBSP430clockSRC_SMCLK_PU_DEFAULT	The default clock source for SMCLK. The selected clock is peripheral-dependent and likely to be one of eBSP430clockSRC_DCOCLK or eBSP430clockSRC_DCOCLKDIV.
eBSP430clockSRC_XT2CLK	A secondary external clock. This is only recognized if BSP430_CLOCK_NOMINAL_XT2CLK_HZ has been provided.
eBSP430clockSRC_HFXTCLK	Convenience alias for CS_A peripherals which renamed this clock.
eBSP430clockSRC_MODCLK	Internal low-power oscillator that exists only on CS_A and CS4 peripherals.
eBSP430clockSRC_LFMODCLK	Internal low-power oscillator that exists only on CS_A and CS4 peripherals.
eBSP430clockSRC_XT1CLK_OR_VLOCLK	Fallback: use XT1CLK if BSP430_CLOCK_LFXT1_IS_FAULTED_NI() is false, otherwise use VLOCLK. The main value of this is in BC2-based clocks, where selecting XT1CLK as the source for ACLK will cause ACLK to fall back to VLOCLK if the crystal is faulted, but using the resulting ACLK as a timer source will not work.
eBSP430clockSRC_XT1CLK_OR_REFOCLK	Fallback: use XT1CLK if BSP430_CLOCK_LFXT1_IS_FAULTED_NI() is false, otherwise use REFOCLK. Similar to eBSP430clockSRC_XT1CLK_OR_VLOCLK for UCS-based systems.
eBSP430clockSRC_XT1CLK_FALLBACK	Fallback: use XT1CLK if BSP430_CLOCK_LFXT1_IS_FAULTED_NI() is false, otherwise use the most precise available internal reference clock. Generally this will be equivalent to eBSP430clockSRC_XT1CLK_OR_VLOCLK or eBSP430clockSRC_XT1CLK_OR_REFOCLK, depending on what clock peripheral is available. Use ulBSP430clockACLK_Hz_ni() to determine what the actual (nominal) speed is.
eBSP430clockSRC_UNKNOWN_1	A unique unrecognized value. Not a valid source for clock configuration.
eBSP430clockSRC_UNKNOWN_4	A unique unrecognized value. Not a valid source for clock configuration.
eBSP430clockSRC_UNKNOWN_5	A unique unrecognized value. Not a valid source for clock configuration.
eBSP430clockSRC_UNKNOWN_6	A unique unrecognized value. Not a valid source for clock configuration.
eBSP430clockSRC_UNKNOWN_7	A unique unrecognized value. Not a valid source for clock configuration.
eBSP430clockSRC_TCLK	A value representing an external clock, potentially used as a timer source. Not a valid source for clock configuration, and will never compare equal to a clock source value. Only returned from xBSP430timerClockSource().
eBSP430clockSRC_ITCLK	A value representing an inverted external clock, potentially used as a timer source. Not a valid source for clock configuration, and will never compare equal to a clock source value. Only returned from xBSP430timerClockSource().

Function Documentation

int iBSP430clockConfigureACLK_ni	(	eBSP430clockSource	sel,
		unsigned int	dividing_shift
	)

Configure ACLK to a source clock.

The peripheral-specific implementation will configure ACLK to source from the requested clock.

Parameters

sel	the source from which the clock should be selected. Note that the values permit an internal decision, e.g. to prefer LFXT1 but to use an alternative if that is faulted. Configuration is rejected if the requested clock source does not exist on the platform.
dividing_shift	exponent of a divider used to reduce jitter and/or clock rate. Not all peripherals support this; a value of zero is implicitly used in that situation.

Returns: 0 if the configuration was accepted, a negative error if it was rejected.

See also: BSP430_PLATFORM_BOOT_ACLK_SOURCE, BSP430_PLATFORM_BOOT_ACLK_DIVIDING_SHIFT

int iBSP430clockConfigureLFXT1_ni	(	int	enablep,
		int	loop_limit
	)

Configure (or deconfigure) XT1 as a clock source.

The peripheral-specific implementation will use iBSP430platformConfigurePeripheralPins_ni with BSP430_PERIPH_LFXT1 to configure the crystal. If crystal functionality has been requested, it then clears oscillator faults, delays BSP430_CLOCK_LFXT1_STABILIZATION_DELAY_CYCLES, then detects whether the crystal is functioning. It terminates with success once the oscillator remains unfaulted after the delay, and otherwise repeats the clear/delay/check process as specified by loop_limit.

Parameters

enablep	Pass a nonzero value to configure XIN/XOUT for crystal functionality and to loop until the crystal is stabilized or has failed to stabilize. Pass a zero value to turn off the crystal function: this reconfigures pins to their digital port function, disables the crystal, and clears any crystal capacitance setting.
loop_limit	The number of times the stabilization check should be repeated. If stabilization has not been achieved after this many loops, assume the crystal is absent and configure for VLOCLK. A negative value indicates the process should loop until stabilization is detected. A zero value is equivalent to passing a zero value as `enablep`.

Returns: Zero if XT1 was disabled by the call, and a positive value if XT1 is stable on completion of the call (available as a clock source). A negative value indicates an error, such as inability to configure XIN/XOUT pins. Thus, the crystal is available and stable only if a positive value is returned.

int iBSP430clockConfigureSMCLK_ni	(	eBSP430clockSource	sel,
		unsigned int	dividing_shift
	)

Configure SMCLK to a source clock.

The peripheral-specific implementation will configure SMCLK to source from the requested clock.

Parameters

sel	the source from which the clock should be selected. Note that the values permit an internal decision, e.g. to prefer LFXT1 but to use an alternative if that is faulted. Configuration is rejected if the requested clock source does not exist on the platform.
dividing_shift	exponent of a divider used to reduce jitter and/or clock rate. Not all peripherals support this; a value of zero is implicitly used in that situation.

Returns: 0 if the configuration was accepted, a negative error if it was rejected.

See also: BSP430_PLATFORM_BOOT_SMCLK_SOURCE, BSP430_PLATFORM_BOOT_SMCLK_DIVIDING_SHIFT

int iBSP430clockConfigureXT2_ni	(	int	enablep,
		int	loop_limit
	)

Same as iBSP430clockConfigureLFXT1_ni() but for XT2.

The function is not implemented if XT2CLK is not supported on the platform.

Dependency:: BSP430_CLOCK_NOMINAL_XT2CLK_HZ

static BSP430_CORE_INLINE int iBSP430clockSourceSynchronous	(	eBSP430clockSource	s1,
		eBSP430clockSource	s2
	)

static

True iff the two clock sources are synchronous.

static BSP430_CORE_INLINE unsigned int uiBSP430clockACLK_Hz ( void )

static

Interruptible-preserving wrapper for uiBSP430clockACLK_Hz_ni()

Deprecated:: : Use ulBSP430clockACLK_Hz()

static BSP430_CORE_INLINE unsigned int uiBSP430clockACLK_Hz_ni ( void )

static

Return the best available estimate of slow ACLK frequency.

Same as ulBSP430clockACLK_Hz_ni() but for use where ACLK is a low-frequency clock.

Deprecated:: : Use ulBSP430clockACLK_Hz_ni()

static BSP430_CORE_INLINE unsigned long ulBSP430clockACLK_Hz ( void )

static

Interruptible-preserving wrapper for ulBSP430clockACLK_Hz_ni()

Examples:: periph/timer/alarm/main.c.

unsigned long ulBSP430clockACLK_Hz_ni ( void )

Return the best available estimate of ACLK frequency.

Depending on clock configuration, this will return one of BSP430_CLOCK_NOMINAL_XT1CLK_HZ, BSP430_CLOCK_NOMINAL_VLOCLK_HZ, or another constant or possibly measured value.

A value of 0 may be returned if the clock is configured for an unidentified external source.

Note: If the ACLK is configured to source from LFXT1 but BSP430_CLOCK_LFXT1_IS_FAULTED_NI() is true this will return BSP430_CLOCK_NOMINAL_VLOCLK_HZ instead of BSP430_CLOCK_NOMINAL_XT1CLK_HZ.

Returns: an estimate of the ACLK frequency, in Hz

Examples:: bootstrap/applpm/main.c, and bootstrap/clocks/main.c.

unsigned long ulBSP430clockConfigureMCLK_ni ( unsigned long mclk_Hz )

Configure MCLK to a desired frequency.

The peripheral-specific implementation will configure MCLK to a frequency as close as possible to the requested frequency. The actual frequency may be higher or lower than the requested one.

Peripheral-specific notes:

The <bsp430/periph/bc2.h> implementation (2xx family) is normally limited to the calibrated DCO values recorded within the MCU, which are a subset of 1 MHz, 8 MHz, 12 MHz, and 16 MHz. The peripheral will initially be configured to the closest available calibrated frequency. Where a crystal is available configBSP430_BC2_TRIM_TO_MCLK may be used to allow this routine to adjust the DCO to match the specific frequency as closely as possible. The invocation of iBSP430bc2TrimToMCLK_ni() that is used to do this is inhibited if ACLK appears to derive from VLOCLK.
The <bsp430/periph/fllplus.h> implementation (4xx family) relies on presence of a stable LFXT1, and configures to the requested frequency.
The <bsp430/periph/ucs.h> implementation (5xx/6xx family) will set the configuration to the power-up defaults unless BSP430_UCS_TRIM_DCOCLKDIV is available. If it is, then any frequency supported by the MCU may be configured.
The <bsp430/periph/cs.h> implementation (FR5xx family) will select the closest calibrated frequency supported by the MCU. There is no facility for adjusting this to an arbitrary frequency.
The <bsp430/periph/cs4.h> implementation (FR4xx/2xx family) relies on presence of a stable LFXT1 or REFO, and configures to the requested frequency.

Note: Although passing mclk_Hz zero is a short-hand for using BSP430_CLOCK_PUC_MCLK_HZ, the result may not be to restore the clock to its power-up configuration. To avoid manipulating the clocks during platform initialization, see BSP430_PLATFORM_BOOT_CONFIGURE_CLOCKS.

Warning: On some MCUs with the PMM module certain MCLK rates require adjusting the MCU core voltage. See BSP430_PMM_COREV_FOR_MCLK. Platform initialization will do this based on BSP430_CLOCK_NOMINAL_MCLK_HZ.

Parameters

mclk_Hz Desired frequency for the master clock, in Hz. If zero, BSP430_CLOCK_PUC_MCLK_HZ is used.

Returns: Configured frequency in Hz. This may be higher or lower than the requested frequency.

static BSP430_CORE_INLINE unsigned long ulBSP430clockMCLK_Hz ( void )

static

Interruptible-preserving wrapper for ulBSP430clockMCLK_Hz_ni

Examples:: periph/timer/alarm/main.c.

unsigned long ulBSP430clockMCLK_Hz_ni ( void )

Return the best available estimate of MCLK frequency.

Depending on clock capabilities, this may simply return BSP430_CLOCK_NOMINAL_MCLK_HZ, or it may return a value calculated from observations.

Note: This function will hang until any oscillator fault associated with the DCO or its peripheral-specific analogue has been cleared. If the clock configuration is not stable, this function may not return.

Returns: an estimate of the MCLK frequency, in Hz

Examples:: bootstrap/applpm/main.c, and bootstrap/clocks/main.c.

static BSP430_CORE_INLINE unsigned long ulBSP430clockSMCLK_Hz ( void )

static

Interruptible-preserving wrapper for ulBSP430clockSMCLK_Hz_ni

Examples:: periph/timer/alarm/main.c.

unsigned long ulBSP430clockSMCLK_Hz_ni ( void )

Return the best available estimate of SMCLK frequency.

Returns: an estimate of the SMCLK frequency, in Hz

Examples:: bootstrap/applpm/main.c, and bootstrap/clocks/main.c.

eBSP430clockSource xBSP430clockACLKSource ( )

Return a reconstructed source for ACLK.

Note: This may not be the same value as was used for the configuration. It will not take into account resolved fallbacks or faulted crystals. It will be one that uniquely identifies the source for the purposes of source comparison.

eBSP430clockSource xBSP430clockMCLKSource ( )

Return a reconstructed source for MCLK.

Note: This may not be the same value as was used for the configuration. It will not take into account resolved fallbacks or faulted crystals. It will be one that uniquely identifies the source for the purposes of source comparison.

eBSP430clockSource xBSP430clockSMCLKSource ( )

Return a reconstructed source for SMCLK.

Note: This may not be the same value as was used for the configuration. It will not take into account resolved fallbacks or faulted crystals. It will be one that uniquely identifies the source for the purposes of source comparison.

Enumerations
enum	eBSP430clockSource { eBSP430clockSRC_NONE, eBSP430clockSRC_XT1CLK, eBSP430clockSRC_VLOCLK, eBSP430clockSRC_REFOCLK, eBSP430clockSRC_DCOCLK, eBSP430clockSRC_DCOCLKDIV, eBSP430clockSRC_SMCLK_PU_DEFAULT, eBSP430clockSRC_XT2CLK, eBSP430clockSRC_HFXTCLK = eBSP430clockSRC_XT2CLK, eBSP430clockSRC_MODCLK, eBSP430clockSRC_LFMODCLK, eBSP430clockSRC_XT1CLK_OR_VLOCLK, eBSP430clockSRC_XT1CLK_OR_REFOCLK, eBSP430clockSRC_XT1CLK_FALLBACK, eBSP430clockSRC_UNKNOWN_1, eBSP430clockSRC_UNKNOWN_4, eBSP430clockSRC_UNKNOWN_5, eBSP430clockSRC_UNKNOWN_6, eBSP430clockSRC_UNKNOWN_7, eBSP430clockSRC_TCLK, eBSP430clockSRC_ITCLK }

Macros

Typedefs

Enumerations

Functions

Detailed Description

Macro Definition Documentation

Typedef Documentation

Enumeration Type Documentation

Function Documentation