BSP430  20141115
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Macros
cs.h File Reference

Hardware presentation/abstraction for Clock System (CS). More...

#include <bsp430/clock.h>
#include <bsp430/periph.h>

Go to the source code of this file.

Macros

#define BSP430_CS_IS_FR58XX   (BSP430_PERIPH_CS_IS_CSA - 0)
 
#define BSP430_CS_IS_FR57XX   (defined(__MSP430_HAS_CS__) && (! ((BSP430_PERIPH_CS_IS_CSA - 0) || (BSP430_PERIPH_CS_IS_CS4 - 0))))
 
#define BSP430_MODULE_CS   ((BSP430_CS_IS_FR57XX - 0) || (BSP430_CS_IS_FR58XX - 0))
 
#define BSP430_CS_NOMINAL_MODCLK_HZ   5000000UL
 
#define BSP430_CS_NOMINAL_LFMODCLK_HZ   (BSP430_CS_NOMINAL_MODCLK_HZ / 128)
 
#define BSP430_CS_LFXT1_IS_FAULTED_NI()   (CSCTL5 & BSP430_CS_XT1OFFG_)
 
#define BSP430_CS_XT2_IS_FAULTED_NI()   (CSCTL5 & BSP430_CS_XT2OFFG_)
 
#define BSP430_CLOCK_LFXT1_IS_FAULTED_NI()   ((CSCTL4 & BSP430_CS_XT1OFF_) || BSP430_CS_LFXT1_IS_FAULTED_NI())
 
#define BSP430_CLOCK_XT2_IS_FAULTED_NI()   ((CSCTL4 & BSP430_CS_XT2OFF_) || BSP430_CS_XT2_IS_FAULTED_NI())
 
#define BSP430_CS_CLEAR_FAULTS_NI()
 
#define BSP430_CLOCK_CLEAR_FAULTS_NI()
 
#define BSP430_CS_FRAM_NWAITS_FOR_FREQ(freq_)   include <bsp430/platform.h>
 
#define BSP430_CLOCK_NOMINAL_VLOCLK_HZ   10000U
 
#define BSP430_CLOCK_PUC_MCLK_HZ   1048576UL
 

Detailed Description

Hardware presentation/abstraction for Clock System (CS).

The Clock System (CS) peripheral is present in FR5xx-family devices. Variant CS is used in FR57xx devices; variant CS_A is used in FR58xx/FR59xx devices. They differ in the names for constants related to low and high frequency crystals, in the set of supported DCOCLK frequencies, and in whether DCOCLK can source ACLK.

Note
The CS peripheral on the FR4xx/2xx-family devices is completely different and its supporting material is provided in the <bsp430/periph/cs4.h> header.

Module Configuration Options

None supported.

Hardware Presentation Layer

As there can be only one instance of CS on any MCU, there is no structure supporting a CS HPL. Manipulate the peripheral through its registers directly.

Hardware Adaptation Layer

As there can be only one instance of CS on any MCU, there is no structure supporting a CS HAL.

The standard set of capabilities in the bsp430/clocks.h header are supported, with the following details:

Homepage
http://github.com/pabigot/bsp430

Macro Definition Documentation

#define BSP430_CLOCK_CLEAR_FAULTS_NI ( )
Value:
do { \
CSCTL0_H = 0xA5; \
CSCTL0_H = !0xA5; \
} while (0)
#define BSP430_CLOCK_OSC_CLEAR_FAULT_NI()
Definition: clock.h:230
#define BSP430_CS_CLEAR_FAULTS_NI()
Definition: cs.h:243

Clear all clock faults.

This definition overrides the generic definition to clear the crystal-specific flags as well as the system flag.

Defaulted:
The value here is superseded by previously encountered definitions.
#define BSP430_CLOCK_LFXT1_IS_FAULTED_NI ( )    ((CSCTL4 & BSP430_CS_XT1OFF_) || BSP430_CS_LFXT1_IS_FAULTED_NI())

Check whether the CS-controlled LFXT1 crystal has a fault condition.

Note
Oscillator fault flags are not set unless a fault has been detected. If the crystal has never been enabled, no fault will have been detected. On power-up, the XIN function is not enabled and CSCTL4.XT1OFF is set, and BSP430 treats CSCTL4.XT1OFF as an indication that the pins are not configured for crystal use, either because LFXT1 has not been configured or has been configured and found to be faulted. Although it is perfectly acceptable to have CSCTL4.XT1OFF set and the crystal working fine, the complexity of detecting that case is not supported by this implementation.
Defaulted:
The value here is superseded by previously encountered definitions.
See also
BSP430_CS_LFXT1_IS_FAULTED_NI()
#define BSP430_CLOCK_NOMINAL_VLOCLK_HZ   10000U

Unconditional define for peripheral-specific constant

#define BSP430_CLOCK_PUC_MCLK_HZ   1048576UL

Unconditional define for peripheral-specific constant

#define BSP430_CLOCK_XT2_IS_FAULTED_NI ( )    ((CSCTL4 & BSP430_CS_XT2OFF_) || BSP430_CS_XT2_IS_FAULTED_NI())

Check whether the CS-controlled XT2 crystal has a fault condition.

Note
Oscillator fault flags are not set unless a fault has been detected. If the crystal has never been enabled, no fault will have been detected. On power-up, the XT2IN function is not enabled and CSCTL4.XT2OFF is set, and BSP430 treats CSCTL4.XT2OFF as an indication that the pins are not configured for crystal use, either because XT2 has not been configured or has been configured and found to be faulted. Although it is perfectly acceptable to have CSCTL4.XT2OFF set and the crystal working fine, the complexity of detecting that case is not supported by this implementation.
Defaulted:
The value here is superseded by previously encountered definitions.
See also
BSP430_CS_XT2_IS_FAULTED_NI()
#define BSP430_CS_CLEAR_FAULTS_NI ( )
Value:
do { \
CSCTL5 &= ~(BSP430_CS_XT2OFFG_ | BSP430_CS_XT1OFFG_); \
} while (0)

Clear all CS-specific faults.

Note
This does not unlock the CS registers. Invoking it while registers are locked will result in a restart.
#define BSP430_CS_FRAM_NWAITS_FOR_FREQ (   freq_)    include <bsp430/platform.h>

Determine FRAM wait states required for clock speed.

This is a platform-specific macro to select the appropriate number of wait states required for reliable FRAM access when using a given system clock speed. It should be defined in the platform.h header, based on values specified in the data sheet under Recommended Operating Conditions for f_SYSTEM. A value of zero is used if a negative value is requested.

Parameters
freq_Desired f_SYSTEM (maximum RAM access frequency)
Note
For FR57xx devices this macro is optional, as that family supports an automatic setting for wait states; if the macro is defined it will be used, otherwise it will not. For FR58xx devices setting wait stats manually is required, but if the macro is missing this definition will be used:
#define BSP430_CS_FRAM_NWAITS_FOR_FREQ(freq_) (((int)((freq_)/8000000L)) - 1)
Warning
Though the gloss in the datasheet references MCLK, the FR58xx user's guide documents that wait states also apply to DMA, which may run at a higher speed if MCLK's divisor is greater than SMCLK's. BSP430 assumes MCLK's divisor is one, and so uses the actual configured DCO frequency to determine the wait states. This is sub-optimal, but correct, if all clocks divide that frequency.
Defaulted:
The value here is superseded by previously encountered definitions.
Platform-Based Value:
Undefined here; include <bsp430/platform.h> to obtain the correct value of this macro.
Dependency:
BSP430_CS_IS_FR58XX
#define BSP430_CS_IS_FR57XX   (defined(__MSP430_HAS_CS__) && (! ((BSP430_PERIPH_CS_IS_CSA - 0) || (BSP430_PERIPH_CS_IS_CS4 - 0))))

Determine whether target has a CS or CS_A peripheral.

This macro is defined to a true value if the target peripheral has the FR57xx variant of the CS module.

See also
BSP430_CS_IS_FR58XX
C Preprocessor Only:
This macro may have a value that restricts its use to C preprocessor conditional directives.
Examples:
bootstrap/clocks/main.c.
#define BSP430_CS_IS_FR58XX   (BSP430_PERIPH_CS_IS_CSA - 0)

Determine whether target has a CS or CS_A peripheral.

The base CS peripheral as defined in the FR57xx family has a different set of available clocks and differences in register layout and configurable clock rates from the variant in the FR58xx/FR59xx, which was distinguished as CS_A in the header files originally released for the Wolverine chips. Subsequently TI decided to eliminate the difference in name, while retaining the difference in interface and functionality. This occurs in public release version 1.073 of the MSP430 headers.

This macro is defined to a true value if the target peripheral has the FR58xx variant of the CS module. It uses MSP430_HAS_CS_A if available, otherwise depends on the presence of DCOFSEL2, a bit not available on the original CS peripheral.

C Preprocessor Only:
This macro may have a value that restricts its use to C preprocessor conditional directives.
Examples:
bootstrap/clocks/main.c.
#define BSP430_CS_LFXT1_IS_FAULTED_NI ( )    (CSCTL5 & BSP430_CS_XT1OFFG_)

CS-specific check for LFXT1 crystal fault condition.

This checks exactly for the fault condition.

Note
A crystal that has never been enabled will not register as faulted.
#define BSP430_CS_NOMINAL_LFMODCLK_HZ   (BSP430_CS_NOMINAL_MODCLK_HZ / 128)

Nominal rate of the CS_A peripheral LFMODCLK.

This source exists only in the CS_A version of the CS peripheral. It is driven by an internal low-power oscillator.

#define BSP430_CS_NOMINAL_MODCLK_HZ   5000000UL

The CS_A module supports an internal low-precision high-frequency module clock source running at a nominal 5 MHz rate, for use where SMCLK is unsuitable. Its rate varies with temperature, voltage, and individual device.

This source exists only in the CS_A version of the CS peripheral.

Defaulted:
The value here is superseded by previously encountered definitions.
#define BSP430_CS_XT2_IS_FAULTED_NI ( )    (CSCTL5 & BSP430_CS_XT2OFFG_)

CS-specific check for XT2 crystal fault condition.

If the platform does not support an XT2 crystal no fault is diagnosed.

Note
A crystal that has never been enabled will not register as faulted.
#define BSP430_MODULE_CS   ((BSP430_CS_IS_FR57XX - 0) || (BSP430_CS_IS_FR58XX - 0))

Defined on inclusion of <bsp430/periph/cs.h>. The value evaluates to true if the target MCU supports the Clock System peripheral, and false if it does not.

Note
Although TI calls it a CS module, the Clock System on the FR4xx/2xx devices is not anywhere like this one and is provided by the <bsp430/periph/cs4.h> header.
C Preprocessor Only:
This macro may have a value that restricts its use to C preprocessor conditional directives.