BSP430
20141115
Board Support Package for MSP430 microcontrollers
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include
bsp430
core.h
Go to the documentation of this file.
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/* Copyright 2012-2014, Peter A. Bigot
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* * Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* * Neither the name of the software nor the names of its contributors may be
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* used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef BSP430_CORE_H
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#define BSP430_CORE_H
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#include <
msp430.h
>
/* MSP430 MCU-specific information */
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#include <stdint.h>
/* Size-annotated integral types (uint8_t) */
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#include <stddef.h>
/* NULL and size_t */
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#include <stdbool.h>
/* bool */
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#define BSP430_VERSION 20141115
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#define BSP430_PERIPH_CPPID_NONE 0
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/* !BSP430! insert=periph_cppid */
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/* BEGIN AUTOMATICALLY GENERATED CODE---DO NOT MODIFY [periph_cppid] */
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#define BSP430_PERIPH_CPPID_PORT1 1
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#define BSP430_PERIPH_CPPID_PORT2 2
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#define BSP430_PERIPH_CPPID_PORT3 3
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#define BSP430_PERIPH_CPPID_PORT4 4
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#define BSP430_PERIPH_CPPID_PORT5 5
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#define BSP430_PERIPH_CPPID_PORT6 6
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#define BSP430_PERIPH_CPPID_PORT7 7
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#define BSP430_PERIPH_CPPID_PORT8 8
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#define BSP430_PERIPH_CPPID_PORT9 9
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#define BSP430_PERIPH_CPPID_PORT10 10
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#define BSP430_PERIPH_CPPID_PORT11 11
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#define BSP430_PERIPH_CPPID_TA0 12
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#define BSP430_PERIPH_CPPID_TA1 13
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#define BSP430_PERIPH_CPPID_TA2 14
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#define BSP430_PERIPH_CPPID_TA3 15
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#define BSP430_PERIPH_CPPID_TB0 16
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#define BSP430_PERIPH_CPPID_TB1 17
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#define BSP430_PERIPH_CPPID_TB2 18
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#define BSP430_PERIPH_CPPID_USCI_A0 19
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#define BSP430_PERIPH_CPPID_USCI_A1 20
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#define BSP430_PERIPH_CPPID_USCI_B0 21
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#define BSP430_PERIPH_CPPID_USCI_B1 22
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#define BSP430_PERIPH_CPPID_USCI5_A0 23
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#define BSP430_PERIPH_CPPID_USCI5_A1 24
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#define BSP430_PERIPH_CPPID_USCI5_A2 25
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#define BSP430_PERIPH_CPPID_USCI5_A3 26
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#define BSP430_PERIPH_CPPID_USCI5_B0 27
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#define BSP430_PERIPH_CPPID_USCI5_B1 28
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#define BSP430_PERIPH_CPPID_USCI5_B2 29
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#define BSP430_PERIPH_CPPID_USCI5_B3 30
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#define BSP430_PERIPH_CPPID_EUSCI_A0 31
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#define BSP430_PERIPH_CPPID_EUSCI_A1 32
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#define BSP430_PERIPH_CPPID_EUSCI_A2 33
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#define BSP430_PERIPH_CPPID_EUSCI_B0 34
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/* END AUTOMATICALLY GENERATED CODE [periph_cppid] */
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/* !BSP430! end=periph_cppid */
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#ifndef configBSP430_CORE_INCLUDE_BSP430_CONFIG_FILE
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#define configBSP430_CORE_INCLUDE_BSP430_CONFIG_FILE 1
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#endif
/* configBSP430_CORE_INCLUDE_BSP430_CONFIG_FILE */
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#if (configBSP430_CORE_INCLUDE_BSP430_CONFIG_FILE - 0)
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#include "bsp430_config.h"
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#endif
/* configBSP430_CORE_INCLUDE_BSP430_CONFIG_FILE */
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#ifndef BSP430_CORE_NDEBUG
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#define BSP430_CORE_NDEBUG 0
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#endif
/* BSP430_CORE_NDEBUG */
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#if defined(__MSP430_HAS_MSP430XV2_CPU__)
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#define BSP430_CORE_FAMILY_IS_5XX 1
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#else
/* 5xx == CPUXv2*/
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#define BSP430_CORE_FAMILY_IS_5XX 0
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#endif
/* 5xx == CPUXv2 */
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#ifndef configBSP430_CORE_DISABLE_FLL
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#define configBSP430_CORE_DISABLE_FLL (defined(__MSP430_HAS_UCS__) || defined(__MSP430_HAS_UCS_RF__))
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#endif
/* configBSP430_CORE_DISABLE_FLL */
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#ifndef configBSP430_CORE_LPM_EXIT_CLEAR_GIE
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#define configBSP430_CORE_LPM_EXIT_CLEAR_GIE 0
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#endif
/* configBSP430_CORE_LPM_EXIT_CLEAR_GIE */
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#if (configBSP430_CORE_LPM_EXIT_CLEAR_GIE - 0)
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#define BSP430_CORE_LPM_EXIT_CLEAR_GIE_ GIE
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#else
/* configBSP430_CORE_LPM_EXIT_CLEAR_GIE */
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#define BSP430_CORE_LPM_EXIT_CLEAR_GIE_ 0
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#endif
/* configBSP430_CORE_LPM_EXIT_CLEAR_GIE */
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#ifndef BSP430_CORE_LPM_EXIT_MASK
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#if (configBSP430_CORE_DISABLE_FLL - 0)
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#define BSP430_CORE_LPM_EXIT_MASK (BSP430_CORE_LPM_EXIT_CLEAR_GIE_ | (LPM4_bits & ~SCG0))
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#else
/* configBSP430_CORE_DISABLE_FLL */
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#define BSP430_CORE_LPM_EXIT_MASK (BSP430_CORE_LPM_EXIT_CLEAR_GIE_ | LPM4_bits)
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#endif
/* configBSP430_CORE_DISABLE_FLL */
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#endif
/* BSP430_CORE_LPM_EXIT_MASK */
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#define BSP430_CORE_LPM_SR_MASK (SCG1 | SCG0 | OSCOFF | CPUOFF | GIE)
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#define BSP430_CORE_LPM_LPMXp5 0x0100
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#define BSP430_CORE_TOOLCHAIN_GCC (1 < __GNUC__)
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#define BSP430_CORE_TOOLCHAIN_GCC_MSPGCC (1 < __MSPGCC__)
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#define BSP430_CORE_TOOLCHAIN_GCC_MSP430_ELF (BSP430_CORE_TOOLCHAIN_GCC && ! BSP430_CORE_TOOLCHAIN_GCC_MSPGCC)
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#if (BSP430_CORE_TOOLCHAIN_GCC_MSP430_ELF - 0)
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#define __read_status_register() _get_SR_register()
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#define __bis_status_register(v_) _bis_SR_register(v_)
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#define __bic_status_register(v_) _bic_SR_register(v_)
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#define __bic_status_register_on_exit(v_) __bic_SR_register_on_exit(v_)
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#define __bis_status_register_on_exit(v_) __bis_SR_register_on_exit(v_)
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#define __disable_interrupts() _disable_interrupts()
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#define __enable_interrupts() _enable_interrupts()
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#endif
/* RHGCC */
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#define BSP430_CORE_TOOLCHAIN_LIBC_MSP430_LIBC BSP430_CORE_TOOLCHAIN_GCC_MSPGCC
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#define BSP430_CORE_TOOLCHAIN_LIBC_NEWLIB BSP430_CORE_TOOLCHAIN_GCC_MSP430_ELF
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#ifdef __TI_COMPILER_VERSION__
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/* TI's compiler isn't GCC even if somebody added --gcc to the command
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* line, which causes __GNUC__ to be defined (apparently as 3). */
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#undef BSP430_CORE_TOOLCHAIN_GCC
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#define BSP430_CORE_TOOLCHAIN_TI 1
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#endif
/* __TI_COMPILER_VERSION__ */
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#if (BSP430_CORE_TOOLCHAIN_TI - 0)
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#define __read_stack_register() _get_SP_register()
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#define __read_status_register() _get_SR_register()
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#define __bis_status_register(v_) _bis_SR_register(v_)
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#define __bic_status_register(v_) _bic_SR_register(v_)
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#define __bic_status_register_on_exit(v_) _bic_SR_register_on_exit(v_)
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#define __nop() _nop()
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#endif
/* BSP430_CORE_TOOLCHAIN_TI */
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#if defined(BSP430_DOXYGEN) || (BSP430_CORE_TOOLCHAIN_GCC - 0)
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#define BSP430_CORE_INLINE __inline__
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#elif BSP430_CORE_TOOLCHAIN_TI - 0
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#define BSP430_CORE_INLINE __inline
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#else
/* TOOLCHAIN */
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#define BSP430_CORE_INLINE inline
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#endif
/* TOOLCHAIN */
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#if defined(BSP430_DOXYGEN) || (BSP430_CORE_TOOLCHAIN_GCC - 0)
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/* GCC wants both directives */
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#define BSP430_CORE_INLINE_FORCED BSP430_CORE_INLINE __attribute__((__always_inline__))
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#else
/* TOOLCHAIN */
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#define BSP430_CORE_INLINE_FORCED BSP430_CORE_INLINE
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#endif
/* TOOLCHAIN */
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#if defined(BSP430_DOXYGEN) || (BSP430_CORE_TOOLCHAIN_GCC - 0)
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#define BSP430_CORE_PACKED_STRUCT(nm_) struct __attribute__((__packed__)) nm_
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#endif
/* TOOLCHAIN */
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#if (BSP430_CORE_TOOLCHAIN_TI - 0)
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#define BSP430_CORE_DECLARE_INTERRUPT(iv_) _BSP430_CORE_TOOLCHAIN_TI_PRAGMA(vector=##iv_) __interrupt void
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/* Helper function required to make the _Pragma argument a single
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* string literal */
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#define _BSP430_CORE_TOOLCHAIN_TI_PRAGMA(x_) _Pragma(#x_)
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#else
/* TOOLCHAIN */
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#define BSP430_CORE_DECLARE_INTERRUPT(iv_) void __attribute__((__interrupt__(iv_)))
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#endif
/* TOOLCHAIN */
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#define BSP430_CORE_LPM_ENTER(lpm_bits_) __bis_status_register(BSP430_CORE_LPM_SR_MASK & (lpm_bits_))
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#define BSP430_CORE_LPM_ENTER_NI(lpm_bits_) BSP430_CORE_LPM_ENTER(GIE | (lpm_bits_))
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#define BSP430_CORE_LPM_EXIT_FROM_ISR(lpm_bits_) __bic_status_register_on_exit(BSP430_CORE_LPM_SR_MASK & (lpm_bits_))
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#ifndef configBSP430_CORE_SUPPORT_WATCHDOG
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#define configBSP430_CORE_SUPPORT_WATCHDOG 0
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#endif
/* configBSP430_CORE_SUPPORT_WATCHDOG */
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#if (configBSP430_CORE_SUPPORT_WATCHDOG - 0)
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#ifndef BSP430_CORE_WATCHDOG_CLEAR
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#if 20120406 < __MSPGCC__
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#define BSP430_CORE_WATCHDOG_CLEAR() __watchdog_clear()
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#endif
/* MSPGCC */
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#endif
/* BSP430_CORE_WATCHDOG_CLEAR */
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#else
/* configBSP430_CORE_SUPPORT_WATCHDOG */
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#undef BSP430_CORE_WATCHDOG_CLEAR
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#define BSP430_CORE_WATCHDOG_CLEAR() do { } while (0)
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#endif
/* configBSP430_CORE_SUPPORT_WATCHDOG */
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#ifndef BSP430_CORE_WATCHDOG_MAX_DELAY_CYCLES
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#define BSP430_CORE_WATCHDOG_MAX_DELAY_CYCLES 10000U
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#endif
/* BSP430_CORE_WATCHDOG_MAX_DELAY_CYCLES */
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#if (configBSP430_CORE_SUPPORT_WATCHDOG - 0)
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#define BSP430_CORE_DELAY_CYCLES(duration_mclk_) do { \
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if ((duration_mclk_) > BSP430_CORE_WATCHDOG_MAX_DELAY_CYCLES) { \
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unsigned int _watchdog_iterations = (duration_mclk_) / BSP430_CORE_WATCHDOG_MAX_DELAY_CYCLES; \
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while (0 < _watchdog_iterations--) { \
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__delay_cycles(BSP430_CORE_WATCHDOG_MAX_DELAY_CYCLES); \
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BSP430_CORE_WATCHDOG_CLEAR(); \
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} \
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} \
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__delay_cycles((duration_mclk_) % BSP430_CORE_WATCHDOG_MAX_DELAY_CYCLES); \
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} while (0)
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#else
/* configBSP430_CORE_SUPPORT_WATCHDOG */
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#define BSP430_CORE_DELAY_CYCLES(duration_mclk_) __delay_cycles(duration_mclk_)
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#endif
/* configBSP430_CORE_SUPPORT_WATCHDOG */
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#ifndef BSP430_CORE_INTERRUPT_STATE_T
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#if defined(BSP430_DOXYGEN) || (BSP430_CORE_TOOLCHAIN_GCC_MSPGCC - 0)
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#define BSP430_CORE_INTERRUPT_STATE_T __istate_t
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#else
/* TOOLCHAIN */
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#define BSP430_CORE_INTERRUPT_STATE_T unsigned int
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#endif
/* TOOLCHAIN */
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#endif
/* BSP430_CORE_INTERRUPT_STATE_T */
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#ifndef BSP430_CORE_SAVE_INTERRUPT_STATE
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#define BSP430_CORE_SAVE_INTERRUPT_STATE(state_) do { \
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(state_) = __get_interrupt_state(); \
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} while (0)
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#endif
/* BSP430_CORE_SAVE_INTERRUPT_STATE */
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#ifndef BSP430_CORE_SAVED_INTERRUPT_STATE
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#define BSP430_CORE_SAVED_INTERRUPT_STATE(var_) \
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BSP430_CORE_INTERRUPT_STATE_T var_ = __get_interrupt_state()
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#endif
/* BSP430_CORE_SAVED_INTERRUPT_STATE */
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#ifndef BSP430_CORE_RESTORE_INTERRUPT_STATE
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#define BSP430_CORE_RESTORE_INTERRUPT_STATE(state_) do { \
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__set_interrupt_state(state_); \
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} while (0)
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#endif
/* BSP430_CORE_RESTORE_INTERRUPT_STATE */
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#ifndef BSP430_CORE_ENABLE_INTERRUPT
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#if (BSP430_CORE_FAMILY_IS_5XX - 0)
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#define BSP430_CORE_ENABLE_INTERRUPT() do { \
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__enable_interrupt(); \
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__nop(); \
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} while (0)
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#else
/* BSP430_CORE_FAMILY_IS_5XX */
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#define BSP430_CORE_ENABLE_INTERRUPT() __enable_interrupt()
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#endif
/* BSP430_CORE_FAMILY_IS_5XX */
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#endif
/* BSP430_CORE_ENABLE_INTERRUPT */
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#ifndef BSP430_CORE_DISABLE_INTERRUPT
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#if (BSP430_CORE_TOOLCHAIN_GCC_MSP430_ELF - 0)
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#define BSP430_CORE_DISABLE_INTERRUPT() do { _disable_interrupts(); _no_operation(); } while (0)
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#else
/* BSP430_CORE_TOOLCHAIN */
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#define BSP430_CORE_DISABLE_INTERRUPT() __disable_interrupt()
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#endif
/* BSP430_CORE_TOOLCHAIN */
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#endif
/* BSP430_CORE_DISABLE_INTERRUPT */
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#define BSP430_CORE_US_TO_TICKS(us_, hz_) (((us_) * (unsigned long)(hz_)) / 1000000UL)
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#define BSP430_CORE_TICKS_TO_US(ticks_, hz_) ((1000000UL * (ticks_)) / (hz_))
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#define BSP430_CORE_MS_TO_TICKS(ms_, hz_) (((ms_) * (unsigned long)(hz_)) / 1000UL)
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#define BSP430_CORE_TICKS_TO_MS(ticks_, hz_) ((1000UL * (ticks_)) / (hz_))
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#if (BSP430_CORE_TOOLCHAIN_GCC_MSPGCC - 0)
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#include <byteswap.h>
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#define BSP430_CORE_SWAP_16(w_) bswap_16(w_)
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#elif (BSP430_CORE_TOOLCHAIN_GCC_MSP430_ELF - 0)
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#define BSP430_CORE_SWAP_16(w_) _swap_bytes(w_)
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#else
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#define BSP430_CORE_SWAP_16(w_) (( ((w_) & 0xFF00) >> 8) \
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| (((w_) & 0x00FF) << 8) )
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#endif
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#if (BSP430_CORE_TOOLCHAIN_GCC_MSPGCC - 0)
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#include <byteswap.h>
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#define BSP430_CORE_SWAP_32(lw_) bswap_32(lw_)
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#else
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#define BSP430_CORE_SWAP_32(lw_) (( ((lw_) & 0xFF000000) >> 24) \
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| (((lw_) & 0x00FF0000) >> 8) \
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| (((lw_) & 0x0000FF00) << 8) \
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| (((lw_) & 0x000000FF) << 24) )
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#endif
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/* See <bsp430/rtos/freertos.h> */
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#if (configBSP430_RTOS_FREERTOS - 0)
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/* FreeRTOS defines application behavior in a shared header. Read it
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* in here so everybody agrees on its contents. */
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#include "FreeRTOS.h"
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#define BSP430_RTOS_YIELD_FROM_ISR() portYIELD_FROM_ISR(1)
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#endif
/* configBSP430_RTOS_FREERTOS */
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#ifndef BSP430_RTOS_YIELD_FROM_ISR
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#define BSP430_RTOS_YIELD_FROM_ISR() do { } while (0)
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#endif
/* BSP430_RTOS_YIELD_FROM_ISR */
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#endif
/* BSP430_CORE_H */
msp430.h
Stripped
header supporting Doxygen links.
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