BSP430
20141115
Board Support Package for MSP430 microcontrollers
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Hardware presentation/abstraction for Clock System (CS) on FR4xx/2xx chips. More...
Go to the source code of this file.
Macros | |
#define | BSP430_MODULE_CS4 (BSP430_PERIPH_CS_IS_CS4 - 0) |
#define | BSP430_CS4_FLL_SELREF SELREF__XT1CLK |
#define | BSP430_CS4_DCO_IS_FAULTED_NI() (CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)) |
#define | BSP430_CS4_LFXT1_IS_FAULTED_NI() (CSCTL7 & XT1OFFG) |
#define | BSP430_CS4_XT2_IS_FAULTED_NI() 0 |
#define | BSP430_CLOCK_LFXT1_IS_FAULTED_NI() BSP430_CS4_LFXT1_IS_FAULTED_NI() |
#define | BSP430_CLOCK_XT2_IS_FAULTED_NI() (1) |
#define | BSP430_CS4_CLEAR_FAULTS_NI() |
#define | BSP430_CLOCK_CLEAR_FAULTS_NI() |
#define | BSP430_CLOCK_NOMINAL_VLOCLK_HZ 10000U |
#define | BSP430_CLOCK_PUC_MCLK_HZ 1048576UL |
#define | BSP430_CS4_NOMINAL_XT1CLK_HZ 32768U |
#define | BSP430_CS4_NOMINAL_REFOCLK_HZ 32768U |
#define | BSP430_CS4_NOMINAL_MODCLK_HZ 5000000UL |
Hardware presentation/abstraction for Clock System (CS) on FR4xx/2xx chips.
The Clock System (CS) in FR4xx/2xx-family devices is completely different from the CS system in FR5xx-family devices but it is most same as a UCS peripheral in the F5xx/6xx-family devices cross-bred with an FLL+ peripheral from the 4xx family.
As there can be only one instance of CS4 on any MCU, there is no structure supporting a CS4 HPL. Manipulate the peripheral through its registers directly.
As there can be only one instance of CS4 on any MCU, there is no structure supporting a CS4 HAL.
The standard set of capabilities in the bsp430/clocks.h header are supported, with the following details:
#define BSP430_CLOCK_CLEAR_FAULTS_NI | ( | ) |
Clear all clock faults.
This definition overrides the generic definition to clear the crystal-specific flags as well as the system flag.
#define BSP430_CLOCK_LFXT1_IS_FAULTED_NI | ( | ) | BSP430_CS4_LFXT1_IS_FAULTED_NI() |
Check whether the CS4-controlled LFXT1 crystal has a fault condition.
#define BSP430_CLOCK_NOMINAL_VLOCLK_HZ 10000U |
Unconditional define for peripheral-specific constant
#define BSP430_CLOCK_PUC_MCLK_HZ 1048576UL |
Unconditional define for peripheral-specific constant
#define BSP430_CLOCK_XT2_IS_FAULTED_NI | ( | ) | (1) |
CS4 does not support XT2 so it is always in fault.
#define BSP430_CS4_CLEAR_FAULTS_NI | ( | ) |
Clear all CS4-specific faults.
#define BSP430_CS4_DCO_IS_FAULTED_NI | ( | ) | (CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)) |
CS4-specific check for DCO fault condition
#define BSP430_CS4_FLL_SELREF SELREF__XT1CLK |
Preferred source for FLL clock
This should be a constant denoting the bits to be set in the CS4 control register for SELREF selecting the FLL reference clock. The default value selects XT1CLK, which will internally fall back to REFOCLK if XT1CLK is faulted.
#define BSP430_CS4_LFXT1_IS_FAULTED_NI | ( | ) | (CSCTL7 & XT1OFFG) |
CS4-specific check for LFXT1 crystal fault condition.
This checks exactly for the fault condition.
#define BSP430_CS4_NOMINAL_MODCLK_HZ 5000000UL |
The CS4 module supports an internal low-precision high-frequency module clock source running at a nominal 5 MHz rate, for use where SMCLK is unsuitable. Its rate varies with temperature, voltage, and individual device.
#define BSP430_CS4_NOMINAL_REFOCLK_HZ 32768U |
The CS4 module supports an internally trimmed reference oscillator running at a nominal 32 KiHz rate, for use where XT1 is not populated.
#define BSP430_CS4_NOMINAL_XT1CLK_HZ 32768U |
The CS4 module supports an external crystal which is normally low-frequency. On some devices it may be allowed to be high-frequency.
#define BSP430_CS4_XT2_IS_FAULTED_NI | ( | ) | 0 |
CS4-specific check for XT2 crystal fault condition.
If the platform does not support an XT2 crystal no fault is diagnosed.
#define BSP430_MODULE_CS4 (BSP430_PERIPH_CS_IS_CS4 - 0) |
Defined on inclusion of <bsp430/periph/cs4.h>. The value evaluates to true if the target MCU supports the CS peripheral of the FR4xx/2xx devices, and false if it does not.