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BSP430
20141115
Board Support Package for MSP430 microcontrollers
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BSP430
20141115
Board Support Package for MSP430 microcontrollers
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Platform-specific include for MSP-EXP430F5529 More...
#include <bsp430/platform.h>Go to the source code of this file.
Platform-specific include for MSP-EXP430F5529
The following platform-specific features are supported:
vBSP430platformSpinForJumper_ni The jumper for this platform is P7.7, located at the bottom of header J5 on the right of the board below the JTAG header. Place the jumper between GND and P7.7.
BSP430_PERIPH_EXPOSED_CLOCKS ACLK is made visible on P1.0 which can be found on the J12 or RF1 header. MCLK is made visible on P7.7 which is on header J5 below the JTAG header. SMCLK is made visible on P2.2 which is not brought out to any accessible location.
| #define BSP430_CLOCK_NOMINAL_XT2CLK_HZ 4000000UL |
EXP430F5529 has a 4MHz XT2
| #define BSP430_PLATFORM_EXP430F5529 1 |
Unconditionally define this, so as to produce errors if there is a conflict in definition.
| #define BSP430_PLATFORM_EXP430F5529_LCD_A0_PORT_BIT BIT6 |
Port bit on BSP430_PLATFORM_EXP430F5529_LCD_A0_PORT_PERIPH_HANDLE for LCD A0
| #define BSP430_PLATFORM_EXP430F5529_LCD_A0_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT5 |
BSP430 peripheral handle for port to which LCD A0 (CMD=0, DATA=1) is connected.
| #define BSP430_PLATFORM_EXP430F5529_LCD_COLUMNS 102 |
Width, in pixel columns, of the DOGS102-6 display
| #define BSP430_PLATFORM_EXP430F5529_LCD_CSn_PORT_BIT BIT4 |
Port bit on BSP430_PLATFORM_EXP430F5529_LCD_CSn_PORT_PERIPH_HANDLE for LCD CSn
| #define BSP430_PLATFORM_EXP430F5529_LCD_CSn_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT7 |
BSP430 peripheral handle for port to which LCD chip-select (inverted) is connected.
| #define BSP430_PLATFORM_EXP430F5529_LCD_PAGES 8 |
Height, in pages, of the DOGS102-6 display
| #define BSP430_PLATFORM_EXP430F5529_LCD_ROWS_PER_PAGE 8 |
Height, in pixel rows, of each page of the DOGS102-6 display
| #define BSP430_PLATFORM_EXP430F5529_LCD_RSTn_PORT_BIT BIT7 |
Port bit on BSP430_PLATFORM_EXP430F5529_LCD_RSTn_PORT_PERIPH_HANDLE for LCD RSTn
| #define BSP430_PLATFORM_EXP430F5529_LCD_RSTn_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT5 |
BSP430 peripheral handle for port to which LCD reset (inverted) is connected.
| #define BSP430_PLATFORM_EXP430F5529_LCD_SPI_PERIPH_HANDLE BSP430_PERIPH_USCI5_B1 |
Peripheral handle for SPI access to LCD
| #define configBSP430_PLATFORM_EXP430F5529_CCACLK_NEED_CLK 0 |
Define to control CCACLK capabilities for EXP430F5529 platform
The EXP430F5529 board does a very poor job of making signals accessible. No timer has all of CLK, CC0, and CC1 on header pins.
If this is defined to a true value, selection of configBSP430_TIMER_CCACLK will select a timer for which the CLK signal can be accessed from a board header. If defined to a false value (default), configBSP430_TIMER_CCACLK will select a timer for which the CC0 and CC1 signals can be accessed from a board header.
| #define configBSP430_PLATFORM_EXP430F5529_LCD 0 |
Enable HPL support for on-board LCD
The EXP430F5529 has a DOGS102-6 monochromatic 102x64 pixel LCD on board, including back-light. Power is hard-wired, with backlight PWM on TB0.4 and control through pins on ports 5 and 7.
Defining this constant to a true value enables the configuration of the HPL for ports 5 and 7 and the SPI interface.
1.8.8