core832.hpp File Reference

API specific to the nRF52832 product supporting <nrfcxx/core.hpp>. More...

#include <nrf52.h>

Go to the source code of this file.

Data Structures
struct	nrfcxx::nrf5::PPI_Type
struct	nrfcxx::nrf5::GPIO_Instance< 0 >

Namespaces
	nrfcxx
	Primary namespace for nrfcxx functionality.
	nrfcxx::nrf5
	Namespace holding support for bare nRF5 peripheral instances.

Macros
#define	ADCSeriesVariant_IRQHandler   SAADC_IRQHandler
#define	UPTIME_RTC_IRQHandler   RTC1_IRQHandler

Typedefs
using	nrfcxx::nrf5::BPROT_Type = peripheral< NRF_BPROT_Type >
using	nrfcxx::nrf5::UARTE_Type = peripheral< NRF_UARTE_Type >
using	nrfcxx::nrf5::SPIM_Type = peripheral< NRF_SPIM_Type >
using	nrfcxx::nrf5::TWIM_Type = peripheral< NRF_TWIM_Type >
using	nrfcxx::nrf5::TWIS_Type = peripheral< NRF_TWIS_Type >
using	nrfcxx::nrf5::NFCT_Type = peripheral< NRF_NFCT_Type >
using	nrfcxx::nrf5::SAADC_Type = peripheral< NRF_SAADC_Type >
using	nrfcxx::nrf5::COMP_Type = peripheral< NRF_COMP_Type >
using	nrfcxx::nrf5::EGU_Type = peripheral< NRF_EGU_Type >
using	nrfcxx::nrf5::PWM_Type = peripheral< NRF_PWM_Type >
using	nrfcxx::nrf5::PDM_Type = peripheral< NRF_PDM_Type >
using	nrfcxx::nrf5::MWU_Type = peripheral< NRF_MWU_Type >
using	nrfcxx::nrf5::I2S_Type = peripheral< NRF_I2S_Type >

Variables
static constexpr FICR_Type	nrfcxx::nrf5::FICR {NRF_FICR_BASE}
static constexpr UICR_Type	nrfcxx::nrf5::UICR {NRF_UICR_BASE}
static constexpr BPROT_Type	nrfcxx::nrf5::BPROT {NRF_BPROT_BASE}
static constexpr POWER_Type	nrfcxx::nrf5::POWER {NRF_POWER_BASE, POWER_CLOCK_IRQn}
static constexpr CLOCK_Type	nrfcxx::nrf5::CLOCK {NRF_CLOCK_BASE, POWER_CLOCK_IRQn}
static constexpr RADIO_Type	nrfcxx::nrf5::RADIO {NRF_RADIO_BASE, RADIO_IRQn}
static constexpr UARTE_Type	nrfcxx::nrf5::UARTE0 {NRF_UARTE0_BASE, UARTE0_UART0_IRQn}
static constexpr UART_Type	nrfcxx::nrf5::UART0 {NRF_UART0_BASE, UARTE0_UART0_IRQn}
static constexpr SPIM_Type	nrfcxx::nrf5::SPIM0 {NRF_SPIM0_BASE, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, 0}
static constexpr SPIM_Type	nrfcxx::nrf5::SPIM1 {NRF_SPIM1_BASE, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, 1}
static constexpr SPIM_Type	nrfcxx::nrf5::SPIM2 {NRF_SPIM2_BASE, SPIM2_SPIS2_SPI2_IRQn, 2}
static constexpr SPIS_Type	nrfcxx::nrf5::SPIS0 {NRF_SPIS0_BASE, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, 0}
static constexpr SPIS_Type	nrfcxx::nrf5::SPIS1 {NRF_SPIS1_BASE, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, 1}
static constexpr SPIS_Type	nrfcxx::nrf5::SPIS2 {NRF_SPIS2_BASE, SPIM2_SPIS2_SPI2_IRQn, 2}
static constexpr SPI_Type	nrfcxx::nrf5::SPI0 {NRF_SPI0_BASE, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, 0}
static constexpr SPI_Type	nrfcxx::nrf5::SPI1 {NRF_SPI1_BASE, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, 1}
static constexpr SPI_Type	nrfcxx::nrf5::SPI2 {NRF_SPI2_BASE, SPIM2_SPIS2_SPI2_IRQn, 2}
static constexpr TWIM_Type	nrfcxx::nrf5::TWIM0 {NRF_TWIM0_BASE, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, 0}
static constexpr TWIM_Type	nrfcxx::nrf5::TWIM1 {NRF_TWIM1_BASE, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, 1}
static constexpr TWIS_Type	nrfcxx::nrf5::TWIS0 {NRF_TWIS0_BASE, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, 0}
static constexpr TWIS_Type	nrfcxx::nrf5::TWIS1 {NRF_TWIS1_BASE, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, 1}
static constexpr TWI_Type	nrfcxx::nrf5::TWI0 {NRF_TWI0_BASE, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, 0}
static constexpr TWI_Type	nrfcxx::nrf5::TWI1 {NRF_TWI1_BASE, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, 1}
static constexpr NFCT_Type	nrfcxx::nrf5::NFCT {NRF_NFCT_BASE, NFCT_IRQn}
static constexpr GPIOTE_Type	nrfcxx::nrf5::GPIOTE {NRF_GPIOTE_BASE, GPIOTE_IRQn, GPIOTE_Type::NO_INSTANCE, 8}
static constexpr SAADC_Type	nrfcxx::nrf5::SAADC {NRF_SAADC_BASE, SAADC_IRQn, SAADC_Type::NO_INSTANCE, 8}
static constexpr auto &	nrfcxx::nrf5::ADCVariant = SAADC
static constexpr TIMER_Type	nrfcxx::nrf5::TIMER0 {NRF_TIMER0_BASE, TIMER0_IRQn, 0, 4}
static constexpr TIMER_Type	nrfcxx::nrf5::TIMER1 {NRF_TIMER1_BASE, TIMER1_IRQn, 1, 4}
static constexpr TIMER_Type	nrfcxx::nrf5::TIMER2 {NRF_TIMER2_BASE, TIMER2_IRQn, 2, 4}
static constexpr TIMER_Type	nrfcxx::nrf5::TIMER3 {NRF_TIMER3_BASE, TIMER3_IRQn, 3, 6}
static constexpr TIMER_Type	nrfcxx::nrf5::TIMER4 {NRF_TIMER4_BASE, TIMER4_IRQn, 4, 6}
static constexpr RTC_Type	nrfcxx::nrf5::RTC0 {NRF_RTC0_BASE, RTC0_IRQn, 0, 3}
static constexpr RTC_Type	nrfcxx::nrf5::RTC1 {NRF_RTC1_BASE, RTC1_IRQn, 1, 4}
static constexpr RTC_Type	nrfcxx::nrf5::RTC2 {NRF_RTC2_BASE, RTC2_IRQn, 2, 4}
static constexpr const RTC_Type &	nrfcxx::nrf5::UPTIME_RTC {RTC1}
static constexpr TEMP_Type	nrfcxx::nrf5::TEMP {NRF_TEMP_BASE, TEMP_IRQn}
static constexpr RNG_Type	nrfcxx::nrf5::RNG {NRF_RNG_BASE, RNG_IRQn}
static constexpr ECB_Type	nrfcxx::nrf5::ECB {NRF_ECB_BASE, ECB_IRQn}
static constexpr CCM_Type	nrfcxx::nrf5::CCM {NRF_CCM_BASE, CCM_AAR_IRQn}
static constexpr AAR_Type	nrfcxx::nrf5::AAR {NRF_AAR_BASE, CCM_AAR_IRQn}
static constexpr WDT_Type	nrfcxx::nrf5::WDT {NRF_WDT_BASE, WDT_IRQn}
static constexpr QDEC_Type	nrfcxx::nrf5::QDEC {NRF_QDEC_BASE, QDEC_IRQn}
static constexpr COMP_Type	nrfcxx::nrf5::COMP {NRF_COMP_BASE, COMP_LPCOMP_IRQn}
static constexpr LPCOMP_Type	nrfcxx::nrf5::LPCOMP {NRF_LPCOMP_BASE, COMP_LPCOMP_IRQn}
static constexpr SWI_Type	nrfcxx::nrf5::SWI0 {NRF_SWI0_BASE, SWI0_EGU0_IRQn, 0}
static constexpr SWI_Type	nrfcxx::nrf5::SWI1 {NRF_SWI1_BASE, SWI1_EGU1_IRQn, 1}
static constexpr SWI_Type	nrfcxx::nrf5::SWI2 {NRF_SWI2_BASE, SWI2_EGU2_IRQn, 2}
static constexpr SWI_Type	nrfcxx::nrf5::SWI3 {NRF_SWI3_BASE, SWI3_EGU3_IRQn, 3}
static constexpr SWI_Type	nrfcxx::nrf5::SWI4 {NRF_SWI4_BASE, SWI4_EGU4_IRQn, 4}
static constexpr SWI_Type	nrfcxx::nrf5::SWI5 {NRF_SWI5_BASE, SWI5_EGU5_IRQn, 5}
static constexpr EGU_Type	nrfcxx::nrf5::EGU0 {NRF_EGU0_BASE, SWI0_EGU0_IRQn, 0}
static constexpr EGU_Type	nrfcxx::nrf5::EGU1 {NRF_EGU1_BASE, SWI1_EGU1_IRQn, 1}
static constexpr EGU_Type	nrfcxx::nrf5::EGU2 {NRF_EGU2_BASE, SWI2_EGU2_IRQn, 2}
static constexpr EGU_Type	nrfcxx::nrf5::EGU3 {NRF_EGU3_BASE, SWI3_EGU3_IRQn, 3}
static constexpr EGU_Type	nrfcxx::nrf5::EGU4 {NRF_EGU4_BASE, SWI4_EGU4_IRQn, 4}
static constexpr EGU_Type	nrfcxx::nrf5::EGU5 {NRF_EGU5_BASE, SWI5_EGU5_IRQn, 5}
static constexpr PWM_Type	nrfcxx::nrf5::PWM0 {NRF_PWM0_BASE, PWM0_IRQn, 0}
static constexpr PWM_Type	nrfcxx::nrf5::PWM1 {NRF_PWM1_BASE, PWM1_IRQn, 1}
static constexpr PWM_Type	nrfcxx::nrf5::PWM2 {NRF_PWM2_BASE, PWM2_IRQn, 2}
static constexpr PDM_Type	nrfcxx::nrf5::PDM0 {NRF_PDM_BASE, PDM_IRQn}
static constexpr NVMC_Type	nrfcxx::nrf5::NVMC {NRF_NVMC_BASE}
static constexpr PPI_Type	nrfcxx::nrf5::PPI {}
static constexpr MWU_Type	nrfcxx::nrf5::MWU {NRF_MWU_BASE, MWU_IRQn}
static constexpr I2S_Type	nrfcxx::nrf5::I2S {NRF_I2S_BASE, I2S_IRQn}
static constexpr GPIO_Type	nrfcxx::nrf5::P0 {NRF_P0_BASE, GPIO_Type::NO_IRQ, 0, 32}
static constexpr int	nrfcxx::nrf5::GPIO_PSEL_COUNT = 32
static constexpr const GPIO_Type &	nrfcxx::nrf5::GPIO {P0}

Detailed Description

API specific to the nRF52832 product supporting <nrfcxx/core.hpp>.