nrfcxx::nrf5 Namespace Reference

Namespace holding support for bare nRF5 peripheral instances. More...

Namespaces
	series
	Namespace holding series-specific implementations that support the genericized API of nrfcxx.

Data Structures
struct	GPIO_Instance
	A traits type identifying GPIO peripheral instances. More...
struct	GPIO_Instance< 0 >
struct	GPIO_Instance< 1 >
struct	peripheral
	Capture information about an nRF5 peripheral instance. More...
struct	PPI_Type

Typedefs
using	POWER_Type = nrf5::peripheral< NRF_POWER_Type >
using	CLOCK_Type = peripheral< NRF_CLOCK_Type >
using	MPU_Type = peripheral< NRF_MPU_Type >
using	RADIO_Type = peripheral< NRF_RADIO_Type >
using	UART_Type = peripheral< NRF_UART_Type >
using	SPI_Type = peripheral< NRF_SPI_Type >
using	TWI_Type = peripheral< NRF_TWI_Type >
using	SPIS_Type = peripheral< NRF_SPIS_Type >
using	GPIOTE_Type = peripheral< NRF_GPIOTE_Type >
using	ADC_Type = peripheral< NRF_ADC_Type >
using	TIMER_Type = peripheral< NRF_TIMER_Type >
using	RTC_Type = peripheral< NRF_RTC_Type >
using	TEMP_Type = peripheral< NRF_TEMP_Type >
using	RNG_Type = peripheral< NRF_RNG_Type >
using	ECB_Type = peripheral< NRF_ECB_Type >
using	AAR_Type = peripheral< NRF_AAR_Type >
using	CCM_Type = peripheral< NRF_CCM_Type >
using	WDT_Type = peripheral< NRF_WDT_Type >
using	QDEC_Type = peripheral< NRF_QDEC_Type >
using	LPCOMP_Type = peripheral< NRF_LPCOMP_Type >
using	SWI_Type = peripheral< NRF_SWI_Type >
using	NVMC_Type = peripheral< NRF_NVMC_Type >
using	FICR_Type = peripheral< NRF_FICR_Type >
using	UICR_Type = peripheral< NRF_UICR_Type >
using	GPIO_Type = peripheral< NRF_GPIO_Type >
using	BPROT_Type = peripheral< NRF_BPROT_Type >
using	UARTE_Type = peripheral< NRF_UARTE_Type >
using	SPIM_Type = peripheral< NRF_SPIM_Type >
using	TWIM_Type = peripheral< NRF_TWIM_Type >
using	TWIS_Type = peripheral< NRF_TWIS_Type >
using	NFCT_Type = peripheral< NRF_NFCT_Type >
using	SAADC_Type = peripheral< NRF_SAADC_Type >
using	COMP_Type = peripheral< NRF_COMP_Type >
using	EGU_Type = peripheral< NRF_EGU_Type >
using	PWM_Type = peripheral< NRF_PWM_Type >
using	PDM_Type = peripheral< NRF_PDM_Type >
using	MWU_Type = peripheral< NRF_MWU_Type >
using	I2S_Type = peripheral< NRF_I2S_Type >
using	USBD_Type = peripheral< NRF_USBD_Type >
using	QSPI_Type = peripheral< NRF_QSPI_Type >
using	CC_HOST_RGF_Type = peripheral< NRF_CC_HOST_RGF_Type >
using	CRYPTOCELL_Type = peripheral< NRF_CRYPTOCELL_Type >

Variables
static constexpr POWER_Type	POWER {NRF_POWER_BASE, POWER_CLOCK_IRQn}
static constexpr CLOCK_Type	CLOCK {NRF_CLOCK_BASE, POWER_CLOCK_IRQn}
static constexpr MPU_Type	MPU {NRF_MPU_BASE}
static constexpr RADIO_Type	RADIO {NRF_RADIO_BASE, RADIO_IRQn}
static constexpr UART_Type	UART0 {NRF_UART0_BASE, UART0_IRQn, 0}
static constexpr SPI_Type	SPI0 {NRF_SPI0_BASE, SPI0_TWI0_IRQn, 0}
static constexpr SPI_Type	SPI1 {NRF_SPI1_BASE, SPI1_TWI1_IRQn, 1}
static constexpr TWI_Type	TWI0 {NRF_TWI0_BASE, SPI0_TWI0_IRQn, 0}
static constexpr TWI_Type	TWI1 {NRF_TWI1_BASE, SPI1_TWI1_IRQn, 1}
static constexpr SPI_Type	SPIS1 {NRF_SPIS1_BASE, SPI1_TWI1_IRQn, 1}
static constexpr GPIOTE_Type	GPIOTE {NRF_GPIOTE_BASE, GPIOTE_IRQn, GPIOTE_Type::NO_INSTANCE, 4}
static constexpr ADC_Type	ADC {NRF_ADC_BASE, ADC_IRQn}
static constexpr auto &	ADCVariant = ADC
static constexpr TIMER_Type	TIMER0 {NRF_TIMER0_BASE, TIMER0_IRQn, 0, 4}
static constexpr TIMER_Type	TIMER1 {NRF_TIMER1_BASE, TIMER1_IRQn, 1, 4}
static constexpr TIMER_Type	TIMER2 {NRF_TIMER2_BASE, TIMER2_IRQn, 2, 4}
static constexpr RTC_Type	RTC0 {NRF_RTC0_BASE, RTC0_IRQn, 0, 3}
static constexpr RTC_Type	RTC1 {NRF_RTC1_BASE, RTC1_IRQn, 0, 4}
static constexpr const RTC_Type &	UPTIME_RTC {RTC1}
static constexpr TEMP_Type	TEMP {NRF_TEMP_BASE, TEMP_IRQn}
static constexpr RNG_Type	RNG {NRF_RNG_BASE, RNG_IRQn}
static constexpr ECB_Type	ECB {NRF_ECB_BASE, ECB_IRQn}
static constexpr AAR_Type	AAR {NRF_AAR_BASE, CCM_AAR_IRQn}
static constexpr CCM_Type	CCM {NRF_CCM_BASE, CCM_AAR_IRQn}
static constexpr WDT_Type	WDT {NRF_WDT_BASE, WDT_IRQn}
static constexpr QDEC_Type	QDEC {NRF_QDEC_BASE, QDEC_IRQn}
static constexpr LPCOMP_Type	LPCOMP {NRF_LPCOMP_BASE, LPCOMP_IRQn}
static constexpr SWI_Type	SWI {NRF_SWI_BASE}
static constexpr NVMC_Type	NVMC {NRF_NVMC_BASE}
static constexpr PPI_Type	PPI {}
static constexpr FICR_Type	FICR {NRF_FICR_BASE}
static constexpr UICR_Type	UICR {NRF_UICR_BASE}
static constexpr int	GPIO_PSEL_COUNT = 32
	The number of GPIO PSEL ordinals supported by the platform. More...
static constexpr GPIO_Type	GPIO {NRF_GPIO_BASE, GPIO_Type::NO_IRQ, 0, 32}
static constexpr FICR_Type	FICR {NRF_FICR_BASE}
static constexpr UICR_Type	UICR {NRF_UICR_BASE}
static constexpr BPROT_Type	BPROT {NRF_BPROT_BASE}
static constexpr POWER_Type	POWER {NRF_POWER_BASE, POWER_CLOCK_IRQn}
static constexpr CLOCK_Type	CLOCK {NRF_CLOCK_BASE, POWER_CLOCK_IRQn}
static constexpr RADIO_Type	RADIO {NRF_RADIO_BASE, RADIO_IRQn}
static constexpr UARTE_Type	UARTE0 {NRF_UARTE0_BASE, UARTE0_UART0_IRQn}
static constexpr UART_Type	UART0 {NRF_UART0_BASE, UARTE0_UART0_IRQn}
static constexpr SPIM_Type	SPIM0 {NRF_SPIM0_BASE, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, 0}
static constexpr SPIM_Type	SPIM1 {NRF_SPIM1_BASE, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, 1}
static constexpr SPIM_Type	SPIM2 {NRF_SPIM2_BASE, SPIM2_SPIS2_SPI2_IRQn, 2}
static constexpr SPIS_Type	SPIS0 {NRF_SPIS0_BASE, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, 0}
static constexpr SPIS_Type	SPIS1 {NRF_SPIS1_BASE, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, 1}
static constexpr SPIS_Type	SPIS2 {NRF_SPIS2_BASE, SPIM2_SPIS2_SPI2_IRQn, 2}
static constexpr SPI_Type	SPI0 {NRF_SPI0_BASE, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, 0}
static constexpr SPI_Type	SPI1 {NRF_SPI1_BASE, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, 1}
static constexpr SPI_Type	SPI2 {NRF_SPI2_BASE, SPIM2_SPIS2_SPI2_IRQn, 2}
static constexpr TWIM_Type	TWIM0 {NRF_TWIM0_BASE, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, 0}
static constexpr TWIM_Type	TWIM1 {NRF_TWIM1_BASE, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, 1}
static constexpr TWIS_Type	TWIS0 {NRF_TWIS0_BASE, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, 0}
static constexpr TWIS_Type	TWIS1 {NRF_TWIS1_BASE, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, 1}
static constexpr TWI_Type	TWI0 {NRF_TWI0_BASE, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, 0}
static constexpr TWI_Type	TWI1 {NRF_TWI1_BASE, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, 1}
static constexpr NFCT_Type	NFCT {NRF_NFCT_BASE, NFCT_IRQn}
static constexpr GPIOTE_Type	GPIOTE {NRF_GPIOTE_BASE, GPIOTE_IRQn, GPIOTE_Type::NO_INSTANCE, 8}
static constexpr SAADC_Type	SAADC {NRF_SAADC_BASE, SAADC_IRQn, SAADC_Type::NO_INSTANCE, 8}
static constexpr auto &	ADCVariant = SAADC
static constexpr TIMER_Type	TIMER0 {NRF_TIMER0_BASE, TIMER0_IRQn, 0, 4}
static constexpr TIMER_Type	TIMER1 {NRF_TIMER1_BASE, TIMER1_IRQn, 1, 4}
static constexpr TIMER_Type	TIMER2 {NRF_TIMER2_BASE, TIMER2_IRQn, 2, 4}
static constexpr TIMER_Type	TIMER3 {NRF_TIMER3_BASE, TIMER3_IRQn, 3, 6}
static constexpr TIMER_Type	TIMER4 {NRF_TIMER4_BASE, TIMER4_IRQn, 4, 6}
static constexpr RTC_Type	RTC0 {NRF_RTC0_BASE, RTC0_IRQn, 0, 3}
static constexpr RTC_Type	RTC1 {NRF_RTC1_BASE, RTC1_IRQn, 1, 4}
static constexpr RTC_Type	RTC2 {NRF_RTC2_BASE, RTC2_IRQn, 2, 4}
static constexpr const RTC_Type &	UPTIME_RTC {RTC1}
static constexpr TEMP_Type	TEMP {NRF_TEMP_BASE, TEMP_IRQn}
static constexpr RNG_Type	RNG {NRF_RNG_BASE, RNG_IRQn}
static constexpr ECB_Type	ECB {NRF_ECB_BASE, ECB_IRQn}
static constexpr CCM_Type	CCM {NRF_CCM_BASE, CCM_AAR_IRQn}
static constexpr AAR_Type	AAR {NRF_AAR_BASE, CCM_AAR_IRQn}
static constexpr WDT_Type	WDT {NRF_WDT_BASE, WDT_IRQn}
static constexpr QDEC_Type	QDEC {NRF_QDEC_BASE, QDEC_IRQn}
static constexpr COMP_Type	COMP {NRF_COMP_BASE, COMP_LPCOMP_IRQn}
static constexpr LPCOMP_Type	LPCOMP {NRF_LPCOMP_BASE, COMP_LPCOMP_IRQn}
static constexpr SWI_Type	SWI0 {NRF_SWI0_BASE, SWI0_EGU0_IRQn, 0}
static constexpr SWI_Type	SWI1 {NRF_SWI1_BASE, SWI1_EGU1_IRQn, 1}
static constexpr SWI_Type	SWI2 {NRF_SWI2_BASE, SWI2_EGU2_IRQn, 2}
static constexpr SWI_Type	SWI3 {NRF_SWI3_BASE, SWI3_EGU3_IRQn, 3}
static constexpr SWI_Type	SWI4 {NRF_SWI4_BASE, SWI4_EGU4_IRQn, 4}
static constexpr SWI_Type	SWI5 {NRF_SWI5_BASE, SWI5_EGU5_IRQn, 5}
static constexpr EGU_Type	EGU0 {NRF_EGU0_BASE, SWI0_EGU0_IRQn, 0}
static constexpr EGU_Type	EGU1 {NRF_EGU1_BASE, SWI1_EGU1_IRQn, 1}
static constexpr EGU_Type	EGU2 {NRF_EGU2_BASE, SWI2_EGU2_IRQn, 2}
static constexpr EGU_Type	EGU3 {NRF_EGU3_BASE, SWI3_EGU3_IRQn, 3}
static constexpr EGU_Type	EGU4 {NRF_EGU4_BASE, SWI4_EGU4_IRQn, 4}
static constexpr EGU_Type	EGU5 {NRF_EGU5_BASE, SWI5_EGU5_IRQn, 5}
static constexpr PWM_Type	PWM0 {NRF_PWM0_BASE, PWM0_IRQn, 0}
static constexpr PWM_Type	PWM1 {NRF_PWM1_BASE, PWM1_IRQn, 1}
static constexpr PWM_Type	PWM2 {NRF_PWM2_BASE, PWM2_IRQn, 2}
static constexpr PDM_Type	PDM0 {NRF_PDM_BASE, PDM_IRQn}
static constexpr NVMC_Type	NVMC {NRF_NVMC_BASE}
static constexpr PPI_Type	PPI {}
static constexpr MWU_Type	MWU {NRF_MWU_BASE, MWU_IRQn}
static constexpr I2S_Type	I2S {NRF_I2S_BASE, I2S_IRQn}
static constexpr GPIO_Type	P0 {NRF_P0_BASE, GPIO_Type::NO_IRQ, 0, 32}
static constexpr int	GPIO_PSEL_COUNT = 32
static constexpr const GPIO_Type &	GPIO {P0}
static constexpr FICR_Type	FICR {NRF_FICR_BASE}
static constexpr UICR_Type	UICR {NRF_UICR_BASE}
static constexpr CLOCK_Type	CLOCK {NRF_CLOCK_BASE, POWER_CLOCK_IRQn}
static constexpr POWER_Type	POWER {NRF_POWER_BASE, POWER_CLOCK_IRQn}
static constexpr RADIO_Type	RADIO {NRF_RADIO_BASE, RADIO_IRQn}
static constexpr UARTE_Type	UARTE0 {NRF_UARTE0_BASE, UARTE0_UART0_IRQn, 0}
static constexpr UARTE_Type	UARTE1 {NRF_UARTE1_BASE, UARTE1_IRQn, 1}
static constexpr UART_Type	UART0 {NRF_UART0_BASE, UARTE0_UART0_IRQn}
static constexpr SPIM_Type	SPIM0 {NRF_SPIM0_BASE, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, 0}
static constexpr SPIM_Type	SPIM1 {NRF_SPIM1_BASE, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, 1}
static constexpr SPIM_Type	SPIM2 {NRF_SPIM2_BASE, SPIM2_SPIS2_SPI2_IRQn, 2}
static constexpr SPIM_Type	SPIM3 {NRF_SPIM3_BASE, SPIM3_IRQn, 3}
static constexpr SPIS_Type	SPIS0 {NRF_SPIS0_BASE, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, 0}
static constexpr SPIS_Type	SPIS1 {NRF_SPIS1_BASE, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, 1}
static constexpr SPIS_Type	SPIS2 {NRF_SPIS2_BASE, SPIM2_SPIS2_SPI2_IRQn, 2}
static constexpr SPI_Type	SPI0 {NRF_SPI0_BASE, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, 0}
static constexpr SPI_Type	SPI1 {NRF_SPI1_BASE, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, 1}
static constexpr SPI_Type	SPI2 {NRF_SPI2_BASE, SPIM2_SPIS2_SPI2_IRQn, 2}
static constexpr TWIM_Type	TWIM0 {NRF_TWIM0_BASE, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, 0}
static constexpr TWIM_Type	TWIM1 {NRF_TWIM1_BASE, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, 1}
static constexpr TWIS_Type	TWIS0 {NRF_TWIS0_BASE, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, 0}
static constexpr TWIS_Type	TWIS1 {NRF_TWIS1_BASE, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, 1}
static constexpr TWI_Type	TWI0 {NRF_TWI0_BASE, SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, 0}
static constexpr TWI_Type	TWI1 {NRF_TWI1_BASE, SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, 1}
static constexpr NFCT_Type	NFCT {NRF_NFCT_BASE, NFCT_IRQn}
static constexpr GPIOTE_Type	GPIOTE {NRF_GPIOTE_BASE, GPIOTE_IRQn, GPIOTE_Type::NO_INSTANCE, 8}
static constexpr SAADC_Type	SAADC {NRF_SAADC_BASE, SAADC_IRQn, SAADC_Type::NO_INSTANCE, 8}
static constexpr auto &	ADCVariant = SAADC
static constexpr TIMER_Type	TIMER0 {NRF_TIMER0_BASE, TIMER0_IRQn, 0, 4}
static constexpr TIMER_Type	TIMER1 {NRF_TIMER1_BASE, TIMER1_IRQn, 1, 4}
static constexpr TIMER_Type	TIMER2 {NRF_TIMER2_BASE, TIMER2_IRQn, 2, 4}
static constexpr TIMER_Type	TIMER3 {NRF_TIMER3_BASE, TIMER3_IRQn, 3, 6}
static constexpr TIMER_Type	TIMER4 {NRF_TIMER4_BASE, TIMER4_IRQn, 4, 6}
static constexpr RTC_Type	RTC0 {NRF_RTC0_BASE, RTC0_IRQn, 0, 3}
static constexpr RTC_Type	RTC1 {NRF_RTC1_BASE, RTC1_IRQn, 1, 4}
static constexpr RTC_Type	RTC2 {NRF_RTC2_BASE, RTC2_IRQn, 2, 4}
static constexpr const RTC_Type &	UPTIME_RTC {RTC1}
static constexpr TEMP_Type	TEMP {NRF_TEMP_BASE, TEMP_IRQn}
static constexpr RNG_Type	RNG {NRF_RNG_BASE, RNG_IRQn}
static constexpr ECB_Type	ECB {NRF_ECB_BASE, ECB_IRQn}
static constexpr CCM_Type	CCM {NRF_CCM_BASE, CCM_AAR_IRQn}
static constexpr AAR_Type	AAR {NRF_AAR_BASE, CCM_AAR_IRQn}
static constexpr WDT_Type	WDT {NRF_WDT_BASE, WDT_IRQn}
static constexpr QDEC_Type	QDEC {NRF_QDEC_BASE, QDEC_IRQn}
static constexpr COMP_Type	COMP {NRF_COMP_BASE, COMP_LPCOMP_IRQn}
static constexpr LPCOMP_Type	LPCOMP {NRF_LPCOMP_BASE, COMP_LPCOMP_IRQn}
static constexpr SWI_Type	SWI0 {NRF_SWI0_BASE, SWI0_EGU0_IRQn, 0}
static constexpr SWI_Type	SWI1 {NRF_SWI1_BASE, SWI1_EGU1_IRQn, 1}
static constexpr SWI_Type	SWI2 {NRF_SWI2_BASE, SWI2_EGU2_IRQn, 2}
static constexpr SWI_Type	SWI3 {NRF_SWI3_BASE, SWI3_EGU3_IRQn, 3}
static constexpr SWI_Type	SWI4 {NRF_SWI4_BASE, SWI4_EGU4_IRQn, 4}
static constexpr SWI_Type	SWI5 {NRF_SWI5_BASE, SWI5_EGU5_IRQn, 5}
static constexpr EGU_Type	EGU0 {NRF_EGU0_BASE, SWI0_EGU0_IRQn, 0}
static constexpr EGU_Type	EGU1 {NRF_EGU1_BASE, SWI1_EGU1_IRQn, 1}
static constexpr EGU_Type	EGU2 {NRF_EGU2_BASE, SWI2_EGU2_IRQn, 2}
static constexpr EGU_Type	EGU3 {NRF_EGU3_BASE, SWI3_EGU3_IRQn, 3}
static constexpr EGU_Type	EGU4 {NRF_EGU4_BASE, SWI4_EGU4_IRQn, 4}
static constexpr EGU_Type	EGU5 {NRF_EGU5_BASE, SWI5_EGU5_IRQn, 5}
static constexpr PWM_Type	PWM0 {NRF_PWM0_BASE, PWM0_IRQn, 0}
static constexpr PWM_Type	PWM1 {NRF_PWM1_BASE, PWM1_IRQn, 1}
static constexpr PWM_Type	PWM2 {NRF_PWM2_BASE, PWM2_IRQn, 2}
static constexpr PWM_Type	PWM3 {NRF_PWM3_BASE, PWM3_IRQn, 3}
static constexpr PDM_Type	PDM0 {NRF_PDM_BASE, PDM_IRQn}
static constexpr NVMC_Type	NVMC {NRF_NVMC_BASE}
static constexpr PPI_Type	PPI {}
static constexpr MWU_Type	MWU {NRF_MWU_BASE, MWU_IRQn}
static constexpr I2S_Type	I2S {NRF_I2S_BASE, I2S_IRQn}
static constexpr USBD_Type	USBD {NRF_USBD_BASE, USBD_IRQn}
static constexpr QSPI_Type	QSPI {NRF_QSPI_BASE, QSPI_IRQn}
static constexpr CC_HOST_RGF_Type	CC_HOST_RGF {NRF_CC_HOST_RGF_BASE}
static constexpr CRYPTOCELL_Type	CRYPTOCELL {NRF_CRYPTOCELL_BASE, CRYPTOCELL_IRQn}
static constexpr GPIO_Type	P0 {NRF_P0_BASE, GPIO_Type::NO_IRQ, 0, 32}
static constexpr GPIO_Type	P1 {NRF_P1_BASE, GPIO_Type::NO_IRQ, 1, 16}
static constexpr int	GPIO_PSEL_COUNT = 48
static constexpr const GPIO_Type &	GPIO {P0}

Detailed Description

Namespace holding support for bare nRF5 peripheral instances.

Nordic nRF5 peripherals are defined in the vendor headers with structure layouts (NRF_TWI_Type) with instances at specified addresses (NRF_TWI0_BASE) and IRQ numbers (TWI0_IRQn). Some peripherals have multiple instances. The content of the structures, addresses, and instance is specific to the product (nRF51822 vs nRF52832, etc.).

This namespace provides types and constant values allowing generic reference to peripherals across the product line. Use of constexpr summaries simplifies changing the product or peripheral instance in a single location while leaving code references to the peripheral both optimized (accesses the peripheral registers directly) and generic.

For a peripheral like TWI0 the namespace would provide:

• TWI_Type as a specialization of nrf::peripheral providing product-specific NRF_TWI_Type structure access along with base address, IRQ information, instance ordinal, and other relevant information via nrf::peripheral::AUX.
• Instances of TWI_Type for TWI0, TWI1, etc.
• Correctly typed shadow instances like TWIM0, TWIS0, SPIM0 when the same peripheral address is shared among multiple peripherals.

Code can then generically access the instance registers like TWI0->ADDRESS without need for conditional compilation directives or other overt distinction between products in the application or abstraction code.

Variable Documentation

GPIO_PSEL_COUNT

constexpr int nrfcxx::nrf5::GPIO_PSEL_COUNT = 32

staticconstexpr

The number of GPIO PSEL ordinals supported by the platform.

32 normally, 48 on NRF52840.