pmm.h

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/* Copyright 2012-2014, Peter A. Bigot
 *
 * All rights reserved.
 *
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 * modification, are permitted provided that the following conditions are met:
 *
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 *   this list of conditions and the following disclaimer.
 *
 * * Redistributions in binary form must reproduce the above copyright notice,
 *   this list of conditions and the following disclaimer in the documentation
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 * * Neither the name of the software nor the names of its contributors may be
 *   used to endorse or promote products derived from this software without
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 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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 */

#ifndef BSP430_PERIPH_PMM_H
#define BSP430_PERIPH_PMM_H

#include <bsp430/periph.h>

#define BSP430_MODULE_PMM (defined(__MSP430_HAS_PMM__)          \
                           || defined(__MSP430_HAS_PMM_FR5xx__) \
                           || defined(__MSP430_HAS_PMM_FRAM__))

#define BSP430_MODULE_PMM_FRAM (defined(__MSP430_HAS_PMM_FR5xx__)       \
                                || defined(__MSP430_HAS_PMM_FRAM__))

#define BSP430_PMM_SUPPORTS_COREV ((BSP430_MODULE_PMM - 0) && ! (BSP430_MODULE_PMM_FRAM - 0))

#define BSP430_PMM_SUPPORTS_SVSM ((BSP430_MODULE_PMM - 0) && ! (BSP430_MODULE_PMM_FRAM - 0))

#if defined(BSP430_DOXYGEN) || (BSP430_MODULE_PMM - 0)

#if defined(BSP430_DOXYGEN) || defined(LOCKLPM5)
/* LOCKLPM5 is the clue to whether LPMx.5 mode is supported.  The
 * PM5CTL0 register exists on all MCUs with PMM except the pre-A
 * MSP430F54xx and the CC430x1xx chips (at least, it is not declared
 * on those chips). */

#define BSP430_PMM_ENTER_LPMXp5_NI() do {       \
    PMMCTL0_H = PMMPW_H;                        \
    PMMCTL0 = PMMPW | PMMREGOFF;                \
    PMMCTL0_H = !PMMPW_H;                       \
  } while (0)

#endif /* LOCKLPM5 */

#if defined(BSP430_DOXYGEN) || defined(LOCKLPM5)
#define BSP430_PMM_CLEAR_LOCKLPM5() do { \
    PMMCTL0_H = PMMPW_H;                 \
    PM5CTL0 &= ~LOCKLPM5;                \
    PMMCTL0_H = !PMMPW_H;                \
  } while (0)
#else /* LOCKLPM5 */
#define BSP430_PMM_CLEAR_LOCKLPM5() do { } while (0)
#endif /* LOCKLPM5 */

#if defined(BSP430_DOXYGEN) || (BSP430_PMM_SUPPORTS_SVSM - 0)

#define BSP430_PMM_SET_SVSMCTL_NI(hctl_,lctl_) do {   \
    PMMCTL0_H = PMMPW_H;                              \
    SVSMHCTL = (hctl_);                               \
    SVSMLCTL = (lctl_);                               \
    PMMCTL0_H = !PMMPW_H;                             \
  } while (0)
#endif /* BSP430_PMM_SUPPORTS_SVSM */

static BSP430_CORE_INLINE
void
vBSP430pmmInduceBOR (void)
{
  PMMCTL0 = PMMPW | PMMSWBOR;
}

static BSP430_CORE_INLINE
void
vBSP430pmmInducePOR (void)
{
  PMMCTL0 = PMMPW | PMMSWPOR;
}

#if defined(BSP430_DOXYGEN) || (BSP430_PMM_SUPPORTS_COREV - 0)

#if defined(BSP430_DOXYGEN)
#define BSP430_PMM_COREV_FOR_MCLK(mclk_) include <bsp430/platform.h>
#endif /* BSP430_PMM_COREV_FOR_MCLK */

int iBSP430pmmSetCoreVoltageLevel_ni (unsigned int target_level);

#endif /* PMM not FRAM */

#endif /* BSP430_MODULE_PMM */

#endif /* BSP430_PERIPH_PMM_H */