BSP430
20141115
Board Support Package for MSP430 microcontrollers
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msp430.h
Go to the documentation of this file.
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*
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/* ============================================================================ */
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/* Copyright 2012, Texas Instruments Incorporated */
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/* All rights reserved. */
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/* */
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/* Redistribution and use in source and binary forms, with or without */
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/* modification, are permitted provided that the following conditions */
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/* are met: */
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/* */
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/* * Redistributions of source code must retain the above copyright */
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/* notice, this list of conditions and the following disclaimer. */
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/* */
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/* * Redistributions in binary form must reproduce the above copyright */
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/* notice, this list of conditions and the following disclaimer in the */
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/* documentation and/or other materials provided with the distribution. */
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/* */
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/* * Neither the name of Texas Instruments Incorporated nor the names of */
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/* its contributors may be used to endorse or promote products derived */
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/* from this software without specific prior written permission. */
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/* */
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/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */
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/* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */
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/* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */
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/* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */
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/* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */
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/* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */
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/* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */
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/* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */
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/* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */
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/* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */
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/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */
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/* ============================================================================ */
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/********************************************************************
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*
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* Standard register and bit definitions for the Texas Instruments
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* MSP430 microcontroller.
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*
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* This file supports assembler and C development for
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* msp430XGENERIC device.
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*
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* Texas Instruments, Version 1.0 draft
69
*
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* Rev. 1.0, Setup
71
*
72
*
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********************************************************************/
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75
/************************************************************
76
* STANDARD BITS
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************************************************************/
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#define BIT0 (0x0001)
80
#define BIT1 (0x0002)
81
#define BIT2 (0x0004)
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#define BIT3 (0x0008)
83
#define BIT4 (0x0010)
84
#define BIT5 (0x0020)
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#define BIT6 (0x0040)
86
#define BIT7 (0x0080)
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#define BIT8 (0x0100)
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#define BIT9 (0x0200)
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#define BITA (0x0400)
90
#define BITB (0x0800)
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#define BITC (0x1000)
92
#define BITD (0x2000)
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#define BITE (0x4000)
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#define BITF (0x8000)
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/************************************************************
97
* STATUS REGISTER BITS
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************************************************************/
99
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#define C (0x0001)
103
105
#define Z (0x0002)
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108
#define N (0x0004)
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111
#define V (0x0100)
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#define GIE (0x0008)
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#define CPUOFF (0x0010)
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#define OSCOFF (0x0020)
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#define SCG0 (0x0040)
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#define SCG1 (0x0080)
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/* Low Power Modes coded with Bits 4-7 in SR */
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#define LPM0_bits (CPUOFF)
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#define LPM1_bits (SCG0|CPUOFF)
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#define LPM2_bits (SCG1|CPUOFF)
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#define LPM3_bits (SCG1|SCG0|CPUOFF)
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#define LPM4_bits (SCG1|SCG0|OSCOFF|CPUOFF)
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/************************************************************
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* CPU
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************************************************************/
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#define __MSP430_HAS_MSP430XV2_CPU__
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/* Make sure nobody can accidently reference these values */
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#if defined(BSP430_DOXYGEN)
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#define MC_0 (0x0000)
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#define MC_1 (0x0010)
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#define MC_2 (0x0020)
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#define MC_3 (0x0030)
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#define ID_0 (0x0000)
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#define ID_1 (0x0040)
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#define ID_2 (0x0080)
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#define ID_3 (0x00C0)
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#define CCIS_0 (0x0000)
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#define CCIS_1 (0x1000)
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#define CCIS_2 (0x2000)
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#define CCIS_3 (0x3000)
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#define CM_0 (0x0000)
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#define CM_1 (0x4000)
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#define CM_2 (0x8000)
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#define CM_3 (0xC000)
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/* TAxCCTLx Control Bits */
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#define CM1 (0x8000)
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#define CM0 (0x4000)
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#define CCIS1 (0x2000)
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#define CCIS0 (0x1000)
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#define SCS (0x0800)
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#define SCCI (0x0400)
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#define CAP (0x0100)
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#define OUTMOD2 (0x0080)
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#define OUTMOD1 (0x0040)
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#define OUTMOD0 (0x0020)
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#define CCIE (0x0010)
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#define CCI (0x0008)
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#define OUT (0x0004)
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#define COV (0x0002)
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#define CCIFG (0x0001)
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#define SCS (0x0800)
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#define SCCI (0x0400)
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#define CAP (0x0100)
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#define SELA_0 (0x0000)
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#define SELA_1 (0x0100)
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#define SELA_2 (0x0200)
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#define SELA_3 (0x0300)
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#define SELA_4 (0x0400)
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#define SELA_5 (0x0500)
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#define SELA_6 (0x0600)
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#define SELA_7 (0x0700)
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#define LFXT1S_0 (0x00)
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#define LFXT1S_1 (0x10)
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#define LFXT1S_2 (0x20)
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#define LFXT1S_3 (0x30)
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#define UCBUSY (0x01)
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#define UCPEN (0x80)
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#define UCCKPH (0x80)
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#define UCA10 (0x80)
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#define UCPAR (0x40)
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#define UCCKPL (0x40)
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#define UCSLA10 (0x40)
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#define UCMSB (0x20)
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#define UCMM (0x20)
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#define UC7BIT (0x10)
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#define UCSPB (0x08)
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#define UCMST (0x08)
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#define UCSYNC (0x01)
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// I2C-Mode Bits
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//#define res (0x10) /* reserved */
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#define UCMODE_0 (0x00)
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#define UCMODE_1 (0x02)
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#define UCMODE_2 (0x04)
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#define UCMODE_3 (0x06)
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// UART-Mode Bits
229
#define UCRXEIE (0x20)
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#define UCBRKIE (0x10)
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#define UCTR (0x10)
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#define UCDORM (0x08)
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#define UCTXNACK (0x08)
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#define UCTXADDR (0x04)
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#define UCTXSTP (0x04)
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#define UCTXBRK (0x02)
237
#define UCTXSTT (0x02)
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#define UCSWRST (0x01)
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#define UCSSEL_0 (0x00)
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#define UCSSEL_1 (0x40)
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#define UCSSEL_2 (0x80)
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#define UCSSEL_3 (0xC0)
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/* PMMCTL0 Control Bits */
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248
#define PMMCOREV_0 (0x0000)
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#define PMMCOREV_1 (0x0001)
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#define PMMCOREV_2 (0x0002)
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#define PMMCOREV_3 (0x0003)
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/* PM5CTL0 Power Mode 5 Control Bits */
254
#define LOCKLPM5 (0x0001)
256
extern unsigned int SVSMHCTL;
257
extern unsigned int SVSMLCTL;
258
#define SVSMHRRL1 (0x0002)
259
#define SVSMHRRL2 (0x0004)
260
#define SVSMHDLYST (0x0008)
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#define SVSHMD (0x0010)
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#define SVSMHEVM (0x0040)
263
#define SVSMHACE (0x0080)
264
#define SVSHRVL0 (0x0100)
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#define SVSHRVL1 (0x0200)
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#define SVSHE (0x0400)
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#define SVSHFP (0x0800)
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#define SVMHOVPE (0x1000)
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#define SVMHE (0x4000)
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#define SVMHFP (0x8000)
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#define SVSMLRRL0 (0x0001)
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#define SVSMLRRL1 (0x0002)
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#define SVSMLRRL2 (0x0004)
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#define SVSMLDLYST (0x0008)
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#define SVSLMD (0x0010)
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#define SVSMLEVM (0x0040)
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#define SVSMLACE (0x0080)
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#define SVSLRVL0 (0x0100)
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#define SVSLRVL1 (0x0200)
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#define SVSLE (0x0400)
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#define SVSLFP (0x0800)
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#define SVMLOVPE (0x1000)
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#define SVMLE (0x4000)
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#define SVMLFP (0x8000)
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/* TLV-related offsets and constants */
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288
#define TLV_START (0x1A08)
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#define TLV_END (0x1AFF)
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#define TLV_LDTAG (0x01)
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#define TLV_PDTAG (0x02)
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#define TLV_BLANK (0x05)
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#define TLV_DIERECORD (0x08)
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#define TLV_ADCCAL (0x11)
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#define TLV_ADC12CAL (0x11)
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#define TLV_ADC10CAL (0x13)
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#define TLV_REFCAL (0x12)
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#define TLV_TAGEXT (0xFE)
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#define TAG_DCO_30 (0x01)
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#define TAG_ADC10_1 (0x08)
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#define TAG_ADC12_1 (0x08)
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#define TAG_EMPTY (0xFE)
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/* FLASH-related information */
307
#define LOCKA (0x0040)
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#define LOCKINFO (0x0080)
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/* SYSRSTIV aggregated candidate names */
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#define SYSRSTIV_BOR (0x0002)
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#define SYSRSTIV_RSTNMI (0x0004)
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#define SYSRSTIV_SVMBOR (0x0004)
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#define SYSRSTIV_DOBOR (0x0006)
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#define SYSRSTIV_RSTNMI (0x0006)
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#define SYSRSTIV_DOBOR (0x0008)
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#define SYSRSTIV_LPM5WU (0x0008)
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#define SYSRSTIV_SECYV (0x000A)
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#define SYSRSTIV_DOPOR (0x000C)
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#define SYSRSTIV_SVSL (0x000C)
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#define SYSRSTIV_SVSLIFG (0x000C)
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#define SYSRSTIV_SVSH (0x000E)
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#define SYSRSTIV_SVSHIFG (0x000E)
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#define SYSRSTIV_WDTTO (0x000E)
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#define SYSRSTIV_SVML_OVP (0x0010)
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#define SYSRSTIV_WDTKEY (0x0010)
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#define SYSRSTIV_CCSKEY (0x0012)
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#define SYSRSTIV_SVMH_OVP (0x0012)
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#define SYSRSTIV_DOPOR (0x0014)
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#define SYSRSTIV_PMMKEY (0x0014)
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#define SYSRSTIV_WDTTO (0x0016)
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#define SYSRSTIV_PERF (0x0016)
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#define SYSRSTIV_WDTKEY (0x0018)
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#define SYSRSTIV_FRCTLPW (0x001A)
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#define SYSRSTIV_KEYV (0x001A)
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#define SYSRSTIV_FLLUL (0x001C)
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#define SYSRSTIV_DBDIFG (0x001C)
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#define SYSRSTIV_UBDIFG (0x001C)
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#define SYSRSTIV_PLLUL (0x001C)
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#define SYSRSTIV_PERF (0x001E)
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#define SYSRSTIV_PSSKEY (0x0020)
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#define SYSRSTIV_PMMPW (0x0020)
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#define SYSRSTIV_PMMKEY (0x0020)
344
#define SYSRSTIV_MPUPW (0x0022)
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#define SYSRSTIV_MPUKEY (0x0022)
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#define SYSRSTIV_CSPW (0x0024)
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#define SYSRSTIV_CSKEY (0x0024)
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#define SYSRSTIV_MPUSEGIIFG (0x0026)
349
#define SYSRSTIV_MPUSEGPIFG (0x0026)
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#define SYSRSTIV_MPUSEG1IFG (0x0028)
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#define SYSRSTIV_MPUSEG2IFG (0x002A)
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#define SYSRSTIV_MPUSEG3IFG (0x002C)
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#define SELREF_0 (0x0000)
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#define SELREF_1 (0x0010)
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#define SELREF_2 (0x0020)
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#define SELREF_3 (0x0030)
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#define SELREF_4 (0x0040)
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#define SELREF_5 (0x0050)
360
#define SELREF_6 (0x0060)
361
#define SELREF_7 (0x0070)
362
#define SELREF__XT1CLK (0x0000)
363
#define SELREF__REFOCLK (0x0020)
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#define SELREF__XT2CLK (0x0050)
366
#define XCAP_0 (0x00)
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#define XCAP_1 (0x04)
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#define XCAP_2 (0x08)
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#define XCAP_3 (0x0C)
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#define XCAP0PF (0x00)
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#define XCAP10PF (0x10)
373
#define XCAP14PF (0x20)
374
#define XCAP18PF (0x30)
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#endif
/* BSP430_DOXYGEN */
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379
/************************************************************
380
* ADC10_A
381
************************************************************/
382
#define __MSP430_HAS_ADC10_A__
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#define __MSP430_HAS_ADC10_B__
385
/************************************************************
386
* ADC12 PLUS
387
************************************************************/
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#define __MSP430_HAS_ADC12_PLUS__
389
/************************************************************
390
* ADC12_B
391
************************************************************/
392
#define __MSP430_HAS_ADC12_B__
393
/************************************************************
394
* AES256 Accelerator
395
************************************************************/
396
#define __MSP430_HAS_AES256__
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/*************************************************************
398
* Backup RAM Module
399
*************************************************************/
400
#define __MSP430_HAS_BACKUP_RAM__
401
/*************************************************************
402
* Battery Charger Module
403
*************************************************************/
404
#define __MSP430_HAS_BATTERY_CHARGER__
405
/************************************************************
406
* CapSence_IO 0
407
************************************************************/
408
#define __MSP430_HAS_CAP_SENSE_IO_0__
409
/************************************************************
410
* CapSence_IO 1
411
************************************************************/
412
#define __MSP430_HAS_CAP_SENSE_IO_1__
413
/************************************************************
414
* Comparator B
415
************************************************************/
416
#define __MSP430_HAS_COMPB__
417
/************************************************************
418
* Comparator D
419
************************************************************/
420
#define __MSP430_HAS_COMPD__
421
/*************************************************************
422
* CRC Module
423
*************************************************************/
424
#define __MSP430_HAS_CRC__
425
/************************************************************
426
* CLOCK SYSTEM
427
************************************************************/
428
#define __MSP430_HAS_CS__
429
/************************************************************
430
* CLOCK SYSTEM
431
************************************************************/
432
#define __MSP430_HAS_CS_A__
433
#define DCOFSEL2 (0x0008)
434
/************************************************************
435
* DAC12
436
************************************************************/
437
#define __MSP430_HAS_DAC12_2__
438
/************************************************************
439
* DMA_X
440
************************************************************/
441
#define __MSP430_HAS_DMAX_3__
442
/************************************************************
443
* DMA_X
444
************************************************************/
445
#define __MSP430_HAS_DMAX_6__
446
/*************************************************************
447
* Flash Memory
448
*************************************************************/
449
#define __MSP430_HAS_FLASH__
450
/*************************************************************
451
* FRAM Memory
452
*************************************************************/
453
#define __MSP430_HAS_FRAM_FR5XX__
454
/*************************************************************
455
* FRAM Memory
456
*************************************************************/
457
#define __MSP430_HAS_FRAM__
458
/************************************************************
459
* Memory Protection Unit
460
************************************************************/
461
#define __MSP430_HAS_MPU__
462
/************************************************************
463
* Memory Protection Unit A
464
************************************************************/
465
#define __MSP430_HAS_MPU_A__
466
/************************************************************
467
* LCD_B
468
************************************************************/
469
#define __MSP430_HAS_LCD_B__
470
/************************************************************
471
* HARDWARE MULTIPLIER 32Bit
472
************************************************************/
473
#define __MSP430_HAS_MPY32__
474
/************************************************************
475
* DIGITAL I/O Port1/2 Pull up / Pull down Resistors
476
************************************************************/
477
#define __MSP430_HAS_PORT1_R__
478
#define __MSP430_HAS_PORT2_R__
479
#define __MSP430_HAS_PORTA_R__
480
/************************************************************
481
* DIGITAL I/O Port3/4 Pull up / Pull down Resistors
482
************************************************************/
483
#define __MSP430_HAS_PORT3_R__
484
#define __MSP430_HAS_PORT4_R__
485
#define __MSP430_HAS_PORTB_R__
486
/************************************************************
487
* DIGITAL I/O Port5/6 Pull up / Pull down Resistors
488
************************************************************/
489
#define __MSP430_HAS_PORT5_R__
490
#define __MSP430_HAS_PORT6_R__
491
#define __MSP430_HAS_PORTC_R__
492
/************************************************************
493
* DIGITAL I/O Port7/8 Pull up / Pull down Resistors
494
************************************************************/
495
#define __MSP430_HAS_PORT7_R__
496
#define __MSP430_HAS_PORT8_R__
497
#define __MSP430_HAS_PORTD_R__
498
/************************************************************
499
* DIGITAL I/O Port9/10 Pull up / Pull down Resistors
500
************************************************************/
501
#define __MSP430_HAS_PORT9_R__
502
#define __MSP430_HAS_PORT10_R__
503
#define __MSP430_HAS_PORTE_R__
504
/************************************************************
505
* DIGITAL I/O Port11 Pull up / Pull down Resistors
506
************************************************************/
507
#define __MSP430_HAS_PORT11_R__
508
#define __MSP430_HAS_PORTF_R__
509
/************************************************************
510
* DIGITAL I/O PortJ Pull up / Pull down Resistors
511
************************************************************/
512
#define __MSP430_HAS_PORTJ_R__
513
/************************************************************
514
* PORT MAPPING CONTROLLER
515
************************************************************/
516
#define __MSP430_HAS_PORT_MAPPING__
517
/************************************************************
518
* PORT 2 MAPPING CONTROLLER
519
************************************************************/
520
#define __MSP430_HAS_PORT2_MAPPING__
521
/************************************************************
522
* PMM - Power Management System
523
************************************************************/
524
#define __MSP430_HAS_PMM__
525
/************************************************************
526
* PMM - Power Management System
527
************************************************************/
528
#define __MSP430_HAS_PMM_FR5xx__
529
/************************************************************
530
* PMM - Power Management System for FRAM
531
************************************************************/
532
#define __MSP430_HAS_PMM_FRAM__
533
/************************************************************
534
* Port U
535
************************************************************/
536
#define __MSP430_HAS_PU__
537
/*************************************************************
538
* RAM Control Module
539
*************************************************************/
540
#define __MSP430_HAS_RC__
541
/************************************************************
542
* Shared Reference
543
************************************************************/
544
#define __MSP430_HAS_REF__
545
/************************************************************
546
* Shared Reference
547
************************************************************/
548
#define __MSP430_HAS_REF_A__
549
/************************************************************
550
* Real Time Clock
551
************************************************************/
552
#define __MSP430_HAS_RTC__
553
/************************************************************
554
* Real Time Clock
555
************************************************************/
556
#define __MSP430_HAS_RTC_B__
557
/************************************************************
558
* Real Time Clock
559
************************************************************/
560
#define __MSP430_HAS_RTC_C__
561
/************************************************************
562
* Real Time Clock
563
************************************************************/
564
#define __MSP430_HAS_RTC_CE__
565
/************************************************************
566
* SFR - Special Function Register Module
567
************************************************************/
568
#define __MSP430_HAS_SFR__
569
/************************************************************
570
* SYS - System Module
571
************************************************************/
572
#define __MSP430_HAS_SYS__
573
/************************************************************
574
* Timerx_A7
575
************************************************************/
576
#define __MSP430_HAS_TxA7__
577
/************************************************************
578
* Timerx_B3
579
************************************************************/
580
#define __MSP430_HAS_TxB7__
581
/************************************************************
582
* Timerx_D7
583
************************************************************/
584
#define __MSP430_HAS_TxD7__
585
/************************************************************
586
* UNIFIED CLOCK SYSTEM
587
************************************************************/
588
#define __MSP430_HAS_UCS__
589
/************************************************************
590
* USB
591
************************************************************/
592
#define __MSP430_HAS_USB__
593
/************************************************************
594
* USCI Ax
595
************************************************************/
596
#define __MSP430_HAS_USCI_Ax__
597
/************************************************************
598
* USCI Ax
599
************************************************************/
600
#define __MSP430_HAS_EUSCI_Ax__
601
/************************************************************
602
* WATCHDOG TIMER A
603
************************************************************/
604
#define __MSP430_HAS_WDT_A__
605
/************************************************************
606
* TLV Descriptors
607
************************************************************/
608
#define __MSP430_HAS_TLV__
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