Hardware presentation/abstraction for Power Management Module (PMM). More...

#include <bsp430/periph.h>

Macros
#define	BSP430_MODULE_PMM

#define	BSP430_MODULE_PMM_FRAM

#define	BSP430_PMM_SUPPORTS_COREV ((BSP430_MODULE_PMM - 0) && ! (BSP430_MODULE_PMM_FRAM - 0))

#define	BSP430_PMM_SUPPORTS_SVSM ((BSP430_MODULE_PMM - 0) && ! (BSP430_MODULE_PMM_FRAM - 0))

#define	BSP430_PMM_ENTER_LPMXp5_NI()

#define	BSP430_PMM_CLEAR_LOCKLPM5()

#define	BSP430_PMM_SET_SVSMCTL_NI(hctl_, lctl_)

#define	BSP430_PMM_COREV_FOR_MCLK(mclk_) include <bsp430/platform.h>

Functions
static BSP430_CORE_INLINE void	vBSP430pmmInduceBOR (void)

static BSP430_CORE_INLINE void	vBSP430pmmInducePOR (void)

int	iBSP430pmmSetCoreVoltageLevel_ni (unsigned int target_level)

Detailed Description

Hardware presentation/abstraction for Power Management Module (PMM).

The Power Management Module is present on 5xx/6xx/FR5xx devices, and has differences in FRAM devices that are not reflected by this interface.

Module Configuration Options

None supported.

Hardware Presentation Layer

As there can be only one instance of PMM on any MCU, there is no structure supporting a PMM HPL. Manipulate the peripheral through its registers directly.

Hardware Adaptation Layer

As there can be only one instance of PMM on any MCU, there is no structure supporting a PMM HAL.

Inline functions defined in this module support forcing processor resets that include a complete reset of all registers and peripherals.

Homepage: http://github.com/pabigot/bsp430

Copyright: Copyright 2012-2014, Peter A. Bigot. Licensed under BSD-3-Clause

Macro Definition Documentation

#define BSP430_MODULE_PMM

Value:

(defined(__MSP430_HAS_PMM__)          \
                           || defined(__MSP430_HAS_PMM_FR5xx__) \
                           || defined(__MSP430_HAS_PMM_FRAM__))

Defined on inclusion of <bsp430/periph/pmm.h>. The value evaluates to true if the target MCU supports the Power Management Module, and false if it does not.

C Preprocessor Only:: This macro may have a value that restricts its use to C preprocessor conditional directives.

#define BSP430_MODULE_PMM_FRAM

Value:

(defined(__MSP430_HAS_PMM_FR5xx__) \

|| defined(__MSP430_HAS_PMM_FRAM__))

Defined on inclusion of <bsp430/periph/pmm.h>. The value evaluates to true if the target MCU supports the FRAM version of the Power Management Module, and false if it does not.

Note: The FRAM version of the PMM does not support the supply voltage supervisory and monitoring capabilities.

C Preprocessor Only:: This macro may have a value that restricts its use to C preprocessor conditional directives.

#define BSP430_PMM_CLEAR_LOCKLPM5 ( )

Value:

do { \
    PMMCTL0_H = PMMPW_H;                 \
    PM5CTL0 &= ~LOCKLPM5;                \
    PMMCTL0_H = !PMMPW_H;                \
  } while (0)

Macro to clear the LOCKLPM5 bit.

In the current FR58xx family this bit is set on power-up, even if not waking from LPM3.5 or LPM4.5. Since vBSP430platformInitialize_ni() is supposed to configure things like LEDs, this bit needs to be cleared for normal startup.

Note: Although this bit may be cleared without locking the PMM registers on some FR58xx devices, on other devices the lock is required. On some non-FRAM devices with the PMM module, the bit does not even exist. This macro exists on all MCUs for which BSP430_MODULE_PMM is enabled; it is a no-op if the bit is not supported.

Warning: The implementation assumes that the PMM control registers are locked. The macro will unlock the registers, set the bit for LPMx.5, then lock the registers again. If used in a context where the PMM registers are already unlocked, this will probably not be what you want.

Defaulted:: The value here is superseded by previously encountered definitions.

Platform-Specific Value:: The value here is an example, and may differ from the actual value used depending on platform information.

#define BSP430_PMM_COREV_FOR_MCLK ( mclk_ ) include <bsp430/platform.h>

Determine PMM core voltage setting for clock speed.

This is a platform-specific macro to select the appropriate parameter for iBSP430pmmSetCoreVoltageLevel_ni() based on a desired system clock speed. It should be defined in the platform.h header, based on values specified in the data sheet under Recommended Operating Conditions for f_SYSTEM.

Parameters

mclk_ Desired f_SYSTEM (maximum MCLK frequency)

Defaulted:: The value here is superseded by previously encountered definitions.

Platform-Based Value:: Undefined here; include <bsp430/platform.h> to obtain the correct value of this macro.

Dependency:: BSP430_PMM_SUPPORTS_COREV

#define BSP430_PMM_ENTER_LPMXp5_NI ( )

Value:

do {       \
    PMMCTL0_H = PMMPW_H;                        \
    PMMCTL0 = PMMPW | PMMREGOFF;                \
    PMMCTL0_H = !PMMPW_H;                       \
  } while (0)

Macro to enter LPMx.5 mode

This should be invoked when BSP430_CORE_LPM_LPMXp5 or some other cue indicates that ultra-low-power sleep is desired.

Note: This macro is unavailable on 5xx/6xx chips for which PM5CTL0 is not provided by the MCU headers, possibly due to the presence of erratum PMM8. In particular, it is not available on the CC430F5137 used in the EM430 and SuRF platforms. User code can test whether the macro is defined in order to determine whether the feature is supported.

Warning: The implementation assumes that the PMM control registers are locked. The macro will unlock the registers, set the bit for LPMx.5, then lock the registers again. If used in a context where the PMM registers are already unlocked, this will probably not be what you want.

Examples:: bootstrap/applpm/main.c.

#define BSP430_PMM_SET_SVSMCTL_NI	(	hctl_,
		lctl_
	)

Value:

do {   \
    PMMCTL0_H = PMMPW_H;                              \
    SVSMHCTL = (hctl_);                               \
    SVSMLCTL = (lctl_);                               \
    PMMCTL0_H = !PMMPW_H;                             \
  } while (0)

Macro to set the SVSMLCTL and SVSMLCTL registers

The Supply Voltage Supervisor and Monitor High- and Low-Side Control registers affect the time required for waking from low power modes and the level of power consumption used. Information on timing and power consumption is in the MCU-specific data sheet.

To disable the supervisor and monitor without changing any other configuration, resulting in lowest power use and fastest wakeup, use:

#if (BSP430_PMM_SUPPORTS_SVSM - 0)
BSP430_PMM_SET_SVSMCTL_NI(SVSMHCTL & ~(SVMHE | SVSHE), SVSMLCTL & ~(SVMLE | SVSLE));
#endif // BSP430_PMM_SUPPORTS_SVSM

Parameters

hctl_	The new value for SVSMHCTL, e.g. `SVSMHCTL & ~(SVMHE \| SVSHE)`
lctl_	The new value for SVSMLCTL, e.g. `SVSMLCTL & ~(SVMLE \| SVSLE)`

Warning: Changing any other flags, but particularly the core voltage, may requires care to wait for stability before making changes. See iBSP430pmmSetCoreVoltageLevel_ni() and the peripheral documentation, errata, and application notes.

For wake-up

Each data sheet will specify t_WAKE-UP-FAST (~5 us MSP430F5438A) and t_WAKE-UP-SLOW (~150 us MSP430F5438A), which are the time to move from LPM2, LPM3, or LPM4 to active mode (MCLK running). In the power-on configuration t_WAKE-UP-SLOW will be on by default, resulting in significant delays in interrupt handling, as demonstrated by examples/platform/timer_lpm. Only SVSMLCTL affects wakeup time.

For power consumption

Enabling the SVS increases power consumption (200 nA for MSP430F5438A). In full-performance mode the cost is higher (1.5 uA for MSP430F5438A). The cost is listed in the data sheet in the separately for each of high and low cross supervisory and monitoring functions. Initial experimentation suggests that disabling all four capabilities reduces current by only 3uA in LPM3, though more may be reduced when active.

Dependency:: BSP430_PMM_SUPPORTS_SVSM

Examples:: bootstrap/applpm/main.c, periph/timer/alarm/main.c, and utility/cli/main.c.

#define BSP430_PMM_SUPPORTS_COREV ((BSP430_MODULE_PMM - 0) && ! (BSP430_MODULE_PMM_FRAM - 0))

Defined to a preprocessor true value when the PMM modules supports adjusting core voltage.

This is limited to MCUs that have the PMM module and are not FRAM devices.

C Preprocessor Only:: This macro may have a value that restricts its use to C preprocessor conditional directives.

#define BSP430_PMM_SUPPORTS_SVSM ((BSP430_MODULE_PMM - 0) && ! (BSP430_MODULE_PMM_FRAM - 0))

Defined to a preprocessor true value when the PMM modules supports the supply voltage supervisor and monitor functions.

This is limited to MCUs that have the PMM module and are not FRAM devices.

C Preprocessor Only:: This macro may have a value that restricts its use to C preprocessor conditional directives.

Function Documentation

int iBSP430pmmSetCoreVoltageLevel_ni ( unsigned int target_level )

Safely adjust the PMM core voltage to a desired level.

This function gradually increases or decreases the PMM core voltage to the desired level, or as close to it as can be achieved. The implementation is from MSP430Ware, and includes a workaround for erratum FLASH37. If supply voltage does not support the requested voltage, the closest attainable level will be configured and returned.

Parameters

target_level The power level to be entered. This must be a valid level, i.e. PMMCOREV_0 through PMMCOREV_3, or an error code is returned.

Returns: -1 if the target_level is invalid, otherwise the level at which power is left. This may be less than target_level if the requested level could not be reached due to inadequate supply voltage.

Dependency:: BSP430_PMM_SUPPORTS_COREV

Examples:: bootstrap/applpm/main.c, and platform/exp430f5529/fatfs/main.c.

static BSP430_CORE_INLINE void vBSP430pmmInduceBOR ( void )

static

Cause a brown-out reset

static BSP430_CORE_INLINE void vBSP430pmmInducePOR ( void )

static

Cause a power-on reset

Macros

Functions

Detailed Description

Module Configuration Options

Hardware Presentation Layer

Hardware Adaptation Layer

Macro Definition Documentation

Function Documentation