BSPACM  20150113
Board Support Package for ARM Cortex-M Microcontrollers
Data Fields
sBSPACMi2cBus Struct Reference

Data Fields

NRF_TWI_Type * twi
 
unsigned int timeout_utt
 
uint32_t frequency
 
uint8_t sda_pin
 
uint8_t scl_pin
 
int8_t ppi_chidx
 

Field Documentation

uint32_t sBSPACMi2cBus::frequency

The frequency configuration of the bus, as a value suitable for storage in NRF_TWI_Type::FREQUENCY.

int8_t sBSPACMi2cBus::ppi_chidx

This field identifies the PPI channel that's used for the workaround.

uint8_t sBSPACMi2cBus::scl_pin

The pin used for the SCL function

uint8_t sBSPACMi2cBus::sda_pin

The pin used for the SDA function

unsigned int sBSPACMi2cBus::timeout_utt

The maximum time a read or write operation will wait for per-byte completion before determining that the bus has timed out.

In addition to supporting PAN #56 recovery, this also sets a timeout for other conditions where a follower device might hold the bus longer than expected. The delay must be long enough to accommodate any clock stretching done by the follower.

The specification doesn't define a maximum delay. Note that at 100 kHz transfer of one byte will take 80 us; at 400 kHz it'll take 20 us. This does not account for peripheral transfer delays or waiting for bus control or clock stretching.

The selected delay is specified in microseconds throug hBSPACMi2cConfigureBus() but the stored value is rounded up to the smallest integer clock count supported by the bBSPACMuptimeSleep() infrastructure that is at least as large as the requested delay or BSPACM_I2C_MINIMUM_BUS_TIMEOUT_us, whichever is larger.

In any case where a timeout is detected the TWI peripheral will be power-cycled in accordance with the PAN #56 workaround.

NRF_TWI_Type* sBSPACMi2cBus::twi

The NRF TWI peripheral used for this configuration.


The documentation for this struct was generated from the following file: