BSP430  20141115
Board Support Package for MSP430 microcontrollers
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platform.h
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1 /* Copyright 2012-2014, Peter A. Bigot
2  *
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are met:
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8  * * Redistributions of source code must retain the above copyright notice,
9  * this list of conditions and the following disclaimer.
10  *
11  * * Redistributions in binary form must reproduce the above copyright notice,
12  * this list of conditions and the following disclaimer in the documentation
13  * and/or other materials provided with the distribution.
14  *
15  * * Neither the name of the software nor the names of its contributors may be
16  * used to endorse or promote products derived from this software without
17  * specific prior written permission.
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19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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30  */
31 
54 #ifndef BSP430_PLATFORM_EXP430FR4133_PLATFORM_H
55 #define BSP430_PLATFORM_EXP430FR4133_PLATFORM_H
56 
59 #define BSP430_PLATFORM_EXP430FR4133 1
60 
63 /* Available button definitions */
64 #define BSP430_PLATFORM_BUTTON0_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT1
65 #define BSP430_PLATFORM_BUTTON0_PORT_BIT BIT2
66 #define BSP430_PLATFORM_BUTTON1_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT2
67 #define BSP430_PLATFORM_BUTTON1_PORT_BIT BIT6
68 
69 /* Jumper-controlled red LED on P1.0. Green LED on P4.0 */
70 #define BSP430_LED_RED 0
71 #define BSP430_LED_GREEN 1
72 
73 /* Select FRAM wait states for MSP430FR4133:
74  * zero if <=8 MHz
75  * one if 8 < SYS <= 16
76  * Rated system max frequency is 16MHz, but configurable max is 24MHz
77  * so assume the setting is linear. */
78 #define BSP430_CS_FRAM_NWAITS_FOR_FREQ(freq_) \
79  ((16000000UL < (freq_)) ? 2 : \
80  ((8000000UL < (freq_)) ? 1 : \
81  0))
82 
83 /* No timer peripheral on the MSP430FR4133 supports ACLK captures. */
84 
85 /* !BSP430! insert=emk_platform boosterpack=cc3000boost platform=exp430fr4133 mcu=msp430fr4133 spi=UCB0SOMI tag=cc3000 hal=CSn gpio=IRQn */
86 /* BEGIN AUTOMATICALLY GENERATED CODE---DO NOT MODIFY [emk_platform] */
87 #if (configBSP430_RF_CC3000BOOST - 0)
88 #define BSP430_RF_CC3000 1
89 #define BSP430_RF_CC3000_SPI_PERIPH_HANDLE BSP430_PERIPH_EUSCI_B0
90 #define BSP430_RF_CC3000_PWR_EN_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT8
91 #define BSP430_RF_CC3000_PWR_EN_PORT_BIT BIT1
92 #define BSP430_RF_CC3000_SCLK_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT5
93 #define BSP430_RF_CC3000_SCLK_PORT_BIT BIT1
94 #define BSP430_RF_CC3000_IRQn_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT1
95 #define BSP430_RF_CC3000_IRQn_PORT_BIT BIT7
96 #define BSP430_RF_CC3000_IRQn_TIMER_PERIPH_HANDLE BSP430_PERIPH_TA0
97 #define BSP430_RF_CC3000_IRQn_TIMER_CCIDX 1
98 #define BSP430_RF_CC3000_IRQn_TIMER_CCIS CCIS_0
99 #define BSP430_RF_CC3000_CSn_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT1
100 #define BSP430_RF_CC3000_CSn_PORT_BIT BIT6
101 #define BSP430_RF_CC3000_MOSI_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT5
102 #define BSP430_RF_CC3000_MOSI_PORT_BIT BIT2
103 #define BSP430_RF_CC3000_MISO_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT5
104 #define BSP430_RF_CC3000_MISO_PORT_BIT BIT3
105 #endif /* configBSP430_RF_CC3000BOOST */
106 /* END AUTOMATICALLY GENERATED CODE [emk_platform] */
107 /* !BSP430! end=emk_platform */
108 
109 /* !BSP430! insert=emk_platform boosterpack=anaren_cc110l platform=exp430fr4133 mcu=msp430fr4133 spi=UCB0SOMI tag=cc110x hal=CSn gpio=GDO0,GDO1,GDO2 */
110 /* BEGIN AUTOMATICALLY GENERATED CODE---DO NOT MODIFY [emk_platform] */
111 #if (configBSP430_RF_ANAREN_CC110L - 0)
112 #define BSP430_RF_CC110X 1
113 #define BSP430_RF_CC110X_SPI_PERIPH_HANDLE BSP430_PERIPH_EUSCI_B0
114 #define BSP430_RF_CC110X_GDO2_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT8
115 #define BSP430_RF_CC110X_GDO2_PORT_BIT BIT1
116 #define BSP430_RF_CC110X_GDO0_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT1
117 #define BSP430_RF_CC110X_GDO0_PORT_BIT BIT7
118 #define BSP430_RF_CC110X_GDO0_TIMER_PERIPH_HANDLE BSP430_PERIPH_TA0
119 #define BSP430_RF_CC110X_GDO0_TIMER_CCIDX 1
120 #define BSP430_RF_CC110X_GDO0_TIMER_CCIS CCIS_0
121 #define BSP430_RF_CC110X_CSn_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT1
122 #define BSP430_RF_CC110X_CSn_PORT_BIT BIT6
123 #define BSP430_RF_CC110X_GDO1_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT5
124 #define BSP430_RF_CC110X_GDO1_PORT_BIT BIT3
125 #endif /* configBSP430_RF_ANAREN_CC110L */
126 /* END AUTOMATICALLY GENERATED CODE [emk_platform] */
127 /* !BSP430! end=emk_platform */
128 
129 /* !BSP430! insert=rfem_platform boosterpack=ccem platform=exp430fr4133 mcu=msp430fr4133 */
130 /* BEGIN AUTOMATICALLY GENERATED CODE---DO NOT MODIFY [rfem_platform] */
131 #if (configBSP430_RFEM_CCEM - 0)
132 #define BSP430_RFEM_CCEM 1
133 #define BSP430_RFEM 1
134 #endif /* configBSP430_RFEM_CCEM */
135 #if (BSP430_RFEM_CCEM - 0)
136 #define BSP430_RFEM_SERIAL_PERIPH_HANDLE BSP430_PERIPH_EUSCI_B0
137 #define BSP430_RFEM_RF1P3_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT1
138 #define BSP430_RFEM_RF1P3_PORT_BIT BIT4
139 #define BSP430_RFEM_RF1P7_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT1
140 #define BSP430_RFEM_RF1P7_PORT_BIT BIT0
141 #define BSP430_RFEM_RF1P9_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT1
142 #define BSP430_RFEM_RF1P9_PORT_BIT BIT1
143 #define BSP430_RFEM_RF1P10_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT1
144 #define BSP430_RFEM_RF1P10_PORT_BIT BIT7
145 #define BSP430_RFEM_RF1P10_TIMER_PERIPH_HANDLE BSP430_PERIPH_TA0
146 #define BSP430_RFEM_RF1P10_TIMER_CCIDX 1
147 #define BSP430_RFEM_RF1P10_TIMER_CCIS CCIS_0
148 #define BSP430_RFEM_RF1P12_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT8
149 #define BSP430_RFEM_RF1P12_PORT_BIT BIT1
150 #define BSP430_RFEM_RF1P14_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT1
151 #define BSP430_RFEM_RF1P14_PORT_BIT BIT6
152 #define BSP430_RFEM_RF1P14_TIMER_PERIPH_HANDLE BSP430_PERIPH_TA0
153 #define BSP430_RFEM_RF1P14_TIMER_CCIDX 2
154 #define BSP430_RFEM_RF1P14_TIMER_CCIS CCIS_0
155 #define BSP430_RFEM_RF1P16_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT5
156 #define BSP430_RFEM_RF1P16_PORT_BIT BIT1
157 #define BSP430_RFEM_RF1P18_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT5
158 #define BSP430_RFEM_RF1P18_PORT_BIT BIT2
159 #define BSP430_RFEM_RF1P20_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT5
160 #define BSP430_RFEM_RF1P20_PORT_BIT BIT3
161 #define BSP430_RFEM_RF2P15_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT1
162 #define BSP430_RFEM_RF2P15_PORT_BIT BIT3
163 #define BSP430_RFEM_RF2P18_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT1
164 #define BSP430_RFEM_RF2P18_PORT_BIT BIT5
165 #define BSP430_RFEM_RF2P19_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT8
166 #define BSP430_RFEM_RF2P19_PORT_BIT BIT3
167 #define BSP430_RFEM_RF2P19_TIMER_PERIPH_HANDLE BSP430_PERIPH_TA1
168 #define BSP430_RFEM_RF2P19_TIMER_CCIDX 2
169 #define BSP430_RFEM_RF2P19_TIMER_CCIS CCIS_0
170 #endif /* BSP430_RFEM_CCEM */
171 /* END AUTOMATICALLY GENERATED CODE [rfem_platform] */
172 /* !BSP430! end=rfem_platform */
173 
174 #if (configBSP430_PLATFORM_BOOSTERPACK_SHARP96 - 0)
175 /* CS on P2.4, LCD_EN on P4.3, PWR_en on P4.2, SPI on EUSCI_B0 */
176 #define BSP430_PLATFORM_SHARPLCD_CS_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT2
177 #define BSP430_PLATFORM_SHARPLCD_CS_PORT_BIT BIT4
178 #define BSP430_PLATFORM_SHARPLCD_LCD_EN_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT4
179 #define BSP430_PLATFORM_SHARPLCD_LCD_EN_PORT_BIT BIT3
180 #define BSP430_PLATFORM_SHARPLCD_PWR_EN_PORT_PERIPH_HANDLE BSP430_PERIPH_PORT4
181 #define BSP430_PLATFORM_SHARPLCD_PWR_EN_PORT_BIT BIT2
182 #define BSP430_PLATFORM_SHARPLCD_SPI_PERIPH_HANDLE BSP430_PERIPH_EUSCI_B0
183 #endif /* configBSP430_PLATFORM_BOOSTERPACK_SHARP96 */
184 
187 /* Include generic file, in case this is being included directly */
188 #include <bsp430/platform.h>
189 
190 #endif /* BSP430_PLATFORM_EXP430FR4133_H */
Entrypoint for platform-specific capabilities.