BSP430
20141115
Board Support Package for MSP430 microcontrollers
Main Page
Related Pages
Modules
Data Structures
Files
Examples
File List
Globals
All
Data Structures
Files
Functions
Variables
Typedefs
Enumerations
Enumerator
Macros
Modules
Pages
include
bsp430
platform
exp430f5529
bsp430_config.h
Go to the documentation of this file.
1
/* Copyright 2012-2014, Peter A. Bigot
2
*
3
* All rights reserved.
4
*
5
* Redistribution and use in source and binary forms, with or without
6
* modification, are permitted provided that the following conditions are met:
7
*
8
* * Redistributions of source code must retain the above copyright notice,
9
* this list of conditions and the following disclaimer.
10
*
11
* * Redistributions in binary form must reproduce the above copyright notice,
12
* this list of conditions and the following disclaimer in the documentation
13
* and/or other materials provided with the distribution.
14
*
15
* * Neither the name of the software nor the names of its contributors may be
16
* used to endorse or promote products derived from this software without
17
* specific prior written permission.
18
*
19
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
23
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29
* POSSIBILITY OF SUCH DAMAGE.
30
*/
31
39
#ifndef BSP430_PLATFORM_EXP430F5529_BSP430_CONFIG_H
40
#define BSP430_PLATFORM_EXP430F5529_BSP430_CONFIG_H
41
58
#ifndef configBSP430_PLATFORM_EXP430F5529_CCACLK_NEED_CLK
59
#define configBSP430_PLATFORM_EXP430F5529_CCACLK_NEED_CLK 0
60
#endif
/* configBSP430_PLATFORM_EXP430F5529_CCACLK_NEED_CLK */
61
63
#ifndef configBSP430_PERIPH_XT2
64
#define configBSP430_PERIPH_XT2 1
65
#endif
/* configBSP430_PERIPH_XT2 */
66
69
/* Use native USCI5 for genericized serial port unless told not to */
70
#ifndef configBSP430_SERIAL_USE_USCI5
71
#define configBSP430_SERIAL_USE_USCI5 1
72
#endif
/* configBSP430_SERIAL_USE_USCI5 */
73
74
/* Enable buttons as requested */
75
#if (configBSP430_PLATFORM_BUTTON0 - 0)
76
#if !defined(configBSP430_HAL_PORT1)
77
#define configBSP430_HAL_PORT1 1
78
#else
/* configBSP430_HAL_PORT1 */
79
#define configBSP430_HPL_PORT1 1
80
#endif
/* configBSP430_HAL_PORT1 */
81
#endif
/* configBSP430_PLATFORM_BUTTON0 */
82
#if (configBSP430_PLATFORM_BUTTON1 - 0)
83
#if !defined(configBSP430_HAL_PORT2)
84
#define configBSP430_HAL_PORT2 1
85
#else
/* configBSP430_HAL_PORT2 */
86
#define configBSP430_HPL_PORT2 1
87
#endif
/* configBSP430_HAL_PORT2 */
88
#endif
/* configBSP430_PLATFORM_BUTTON1 */
89
90
/* What to use as a console */
91
#if (configBSP430_CONSOLE - 0)
92
#ifndef BSP430_CONSOLE_SERIAL_PERIPH_CPPID
93
#define BSP430_CONSOLE_SERIAL_PERIPH_CPPID BSP430_PERIPH_CPPID_USCI5_A1
94
#endif
/* BSP430_CONSOLE_SERIAL_PERIPH_CPPID */
95
#endif
/* configBSP430_CONSOLE */
96
97
/* How to use ACLK as a capture/compare input source. This board does
98
* a very poor job of making signals accessible. No timer has all of
99
* CLK, CC0, and CC1 on header pins.
100
*
101
* With CLK: Settings for TB0: T0B6 ccis=1 ; clk P7.7 ; cc0 P5.6 ; cc1 P5.7 -- CC0/CC1 PINS NOT ACCESSIBLE
102
*
103
* Without CLK: Settings for TA2: T2A2 ccis=1 ; clk P2.2 ; cc0 P2.3 ; cc1 P2.4 -- CLK PIN NOT ACCESSIBLE
104
*/
105
#if (configBSP430_TIMER_CCACLK - 0)
106
#ifndef BSP430_TIMER_CCACLK_PERIPH_CPPID
107
#if (configBSP430_PLATFORM_EXP430F5529_CCACLK_NEED_CLK - 0)
108
/* Option preferring CLK */
109
#define BSP430_TIMER_CCACLK_PERIPH_CPPID BSP430_PERIPH_CPPID_TB0
110
111
#ifndef BSP430_TIMER_CCACLK_CLK_PORT_PERIPH_CPPID
112
#define BSP430_TIMER_CCACLK_CLK_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT7
113
#endif
/* BSP430_TIMER_CCACLK_CLK_PORT_PERIPH_CPPID */
114
115
#else
/* configBSP430_PLATFORM_EXP430F5529_CCACLK_NEED_CLK */
116
/* Option preferring CC0/CC1 */
117
#define BSP430_TIMER_CCACLK_PERIPH_CPPID BSP430_PERIPH_CPPID_TA2
118
119
#ifndef BSP430_TIMER_CCACLK_CC0_PORT_PERIPH_CPPID
120
#define BSP430_TIMER_CCACLK_CC0_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT2
121
#endif
/* BSP430_TIMER_CCACLK_CC0_PORT_PERIPH_CPPID */
122
#ifndef BSP430_TIMER_CCACLK_CC1_PORT_PERIPH_CPPID
123
#define BSP430_TIMER_CCACLK_CC1_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT2
124
#endif
/* BSP430_TIMER_CCACLK_CC1_PORT_PERIPH_CPPID */
125
126
#endif
/* configBSP430_PLATFORM_EXP430F5529_CCACLK_NEED_CLK */
127
#endif
/* BSP430_TIMER_CCACLK_PERIPH_CPPID */
128
#endif
/* configBSP430_TIMER_CCACLK */
129
130
/* !BSP430! insert=rfem_config platform=exp430f5529 mcu=msp430f5529 */
131
/* BEGIN AUTOMATICALLY GENERATED CODE---DO NOT MODIFY [rfem_config] */
132
#if (configBSP430_RFEM - 0)
133
#define BSP430_RFEM_SERIAL_PERIPH_CPPID BSP430_PERIPH_CPPID_USCI5_B0
134
#define configBSP430_SERIAL_ENABLE_SPI 1
135
#define configBSP430_HAL_USCI5_B0 1
136
#define BSP430_RFEM_RF1P3_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT2
137
#define BSP430_RFEM_RF1P3_TIMER_PERIPH_CPPID BSP430_PERIPH_CPPID_TA1
138
#define BSP430_RFEM_RF1P5_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT2
139
#define BSP430_RFEM_RF1P5_TIMER_PERIPH_CPPID BSP430_PERIPH_CPPID_TA1
140
#define BSP430_RFEM_RF1P6_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT4
141
#define BSP430_RFEM_RF1P7_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT4
142
#define BSP430_RFEM_RF1P8_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT4
143
#define BSP430_RFEM_RF1P9_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT4
144
#define BSP430_RFEM_RF1P10_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT2
145
#define BSP430_RFEM_RF1P10_TIMER_PERIPH_CPPID BSP430_PERIPH_CPPID_TA2
146
#define BSP430_RFEM_RF1P12_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT2
147
#define BSP430_RFEM_RF1P12_TIMER_PERIPH_CPPID BSP430_PERIPH_CPPID_TA2
148
#define BSP430_RFEM_RF1P14_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT2
149
#define BSP430_RFEM_RF1P16_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT3
150
#define BSP430_RFEM_RF1P18_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT3
151
#define BSP430_RFEM_RF1P20_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT3
152
#define BSP430_RFEM_RF2P13_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT1
153
#define BSP430_RFEM_RF2P15_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT2
154
#define BSP430_RFEM_RF2P15_TIMER_PERIPH_CPPID BSP430_PERIPH_CPPID_TA1
155
#define BSP430_RFEM_RF2P18_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT4
156
#define BSP430_RFEM_RF2P19_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT7
157
#define BSP430_RFEM_RF2P19_TIMER_PERIPH_CPPID BSP430_PERIPH_CPPID_TB0
158
#define BSP430_RFEM_RF2P20_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT6
159
#define BSP430_RFEM_RF3P3_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT1
160
#define BSP430_RFEM_RF3P4_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT2
161
#define BSP430_RFEM_RF3P4_TIMER_PERIPH_CPPID BSP430_PERIPH_CPPID_TA1
162
#define BSP430_RFEM_RF3P5_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT4
163
#define BSP430_RFEM_RF3P6_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT4
164
#define BSP430_RFEM_RF3P7_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT4
165
#define BSP430_RFEM_RF3P8_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT4
166
#define BSP430_RFEM_RF3P9_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT4
167
#define BSP430_RFEM_RF3P10_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT2
168
#define BSP430_RFEM_RF3P10_TIMER_PERIPH_CPPID BSP430_PERIPH_CPPID_TA2
169
#define BSP430_RFEM_RF3P11_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT7
170
#define BSP430_RFEM_RF3P11_TIMER_PERIPH_CPPID BSP430_PERIPH_CPPID_TB0
171
#define BSP430_RFEM_RF3P13_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT2
172
#define BSP430_RFEM_RF3P13_TIMER_PERIPH_CPPID BSP430_PERIPH_CPPID_TA2
173
#define BSP430_RFEM_RF3P14_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT2
174
#define BSP430_RFEM_RF3P14_TIMER_PERIPH_CPPID BSP430_PERIPH_CPPID_TA1
175
#define BSP430_RFEM_RF3P15_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT3
176
#define BSP430_RFEM_RF3P16_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT3
177
#define BSP430_RFEM_RF3P17_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT2
178
#define BSP430_RFEM_RF3P18_PORT_PERIPH_CPPID BSP430_PERIPH_CPPID_PORT3
179
#endif
/* configBSP430_RFEM */
180
/* END AUTOMATICALLY GENERATED CODE [rfem_config] */
181
/* !BSP430! end=rfem_config */
182
183
#if (configBSP430_UTILITY_U8GLIB - 0) && (! defined(configBSP430_PLATFORM_EXP430F5529_LCD))
184
#define configBSP430_PLATFORM_EXP430F5529_LCD 1
185
#endif
/* U8GLIB */
186
187
#if (configBSP430_PLATFORM_EXP430F5529_LCD - 0)
188
/* LCD uses USCI_B1 */
189
#define configBSP430_SERIAL_ENABLE_SPI 1
190
#define configBSP430_HAL_USCI5_B1 1
191
/* A0 (P5.6) and RSTn (P5.7) */
192
#ifndef configBSP430_HPL_PORT5
193
#define configBSP430_HPL_PORT5 1
194
#endif
/* configBSP430_HPL_PORT5 */
195
/* CSn (P7.4) */
196
#ifndef configBSP430_HPL_PORT7
197
#define configBSP430_HPL_PORT7 1
198
#endif
/* configBSP430_HPL_PORT7 */
199
#endif
/* configBSP430_PLATFORM_EXP430F5529_LCD */
200
203
#endif
/* BSP430_PLATFORM_EXP430F5529_BSP430_CONFIG_H */
Generated on Sat Nov 15 2014 11:27:13 for BSP430 by
1.8.8
1.8.8
