nrfcxx  0.1.0
C++-17 Framework for Nordic nRF5 Devices
periph.hpp
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1 /* SPDX-License-Identifier: Apache-2.0 */
2 /* Copyright 2015-2019 Peter A. Bigot */
3 
7 #ifndef NRFCXX_PERIPH_HPP
8 #define NRFCXX_PERIPH_HPP
9 #pragma once
10 
11 #include <nrfcxx/impl.hpp>
12 #include <pabigot/container.hpp>
13 #include <functional>
14 
15 namespace nrfcxx {
16 
18 namespace periph {
19 
20 #ifndef NRFCXX_PERIPH_UART0_RXB_SIZE
21 
23 #define NRFCXX_PERIPH_UART0_RXB_SIZE 8
24 #endif /* NRFCXX_PERIPH_UART0_RXB_SIZE */
25 
26 #ifndef NRFCXX_PERIPH_UART0_TXB_SIZE
27 
29 #define NRFCXX_PERIPH_UART0_TXB_SIZE 32
30 #endif /* NRFCXX_PERIPH_UART0_TXB_SIZE */
31 
42 class UART
43 {
44 public:
46  using fifo_type = pabigot::container::rr_adaptor<uint8_t>;
48  using size_type = unsigned int;
50  using ssize_type = int;
51 
54  {
56  unsigned int tx_count;
57 
59  unsigned int rx_count;
60 
63  unsigned int rx_dropped;
64 
66  unsigned int rx_break_errors;
67 
69  unsigned int rx_frame_errors;
70 
72  unsigned int rx_parity_errors;
73 
75  unsigned int rx_overrun_errors;
76  };
77 
90  void enable (uint32_t cfg_baudrate = UART_BAUDRATE_BAUDRATE_Baud115200,
91  bool hwfc = false);
92 
94  void disable ();
95 
101  bool enabled (bool live = false) const;
102 
117  bool autoenable (int on);
118 
127  ssize_type write (const uint8_t* sp, size_type count);
128 
138  ssize_type read (uint8_t* dp, size_type count);
139 
141  statistics_type statistics () const;
142 
144  static constexpr event_set::event_type EVT_RXAVAIL = 0x01;
145 
147  static constexpr event_set::event_type EVT_TXAVAIL = 0x02;
148 
154  static constexpr event_set::event_type EVT_TXDONE = 0x04;
155 
160  static constexpr event_set::event_type EVT_ERROR = 0x04;
161 
168  event_set& events ();
169 
171  static UART UART0;
172 
179  void irq_handler ();
180 
182  static UART& instance ();
183 
186  const nrf5::UART_Type& peripheral () const
187  {
188  return uart_;
189  }
190 
191 protected:
192  UART (const nrf5::UART_Type& uart,
193  fifo_type& rxb,
194  fifo_type& txb,
195  int rxd_pin,
196  int txd_pin,
197  int cts_pin = -1,
198  int rts_pin = -1) :
199  uart_{uart},
200  rxb_{rxb},
201  txb_{txb},
202  rxd_pin_(rxd_pin), // narrowing conversion
203  txd_pin_(txd_pin),
204  cts_pin_(cts_pin),
205  rts_pin_(rts_pin)
206  { }
207 
208 private:
209  void set_enabled_bi_ (bool on,
210  bool from_autoenable);
211 
212  const nrf5::UART_Type& uart_;
213  fifo_type& rxb_;
214  fifo_type& txb_;
215  statistics_type statistics_{};
216  event_set events_{};
217  uint8_t volatile flags_ = 0;
218  int8_t const rxd_pin_;
219  int8_t const txd_pin_;
220  int8_t const cts_pin_;
221  int8_t const rts_pin_;
222 };
223 
229 class RTC
230 {
231 protected:
232  constexpr RTC (const nrf5::RTC_Type& rtc) :
233  rtc_{rtc}
234  { }
235 
236 public:
238  constexpr static uint32_t counter_modulus = (1U << 24);
239 
241  constexpr static uint32_t counter_mask = (counter_modulus - 1);
242 
251  constexpr static unsigned int counter_delta (uint32_t a,
252  uint32_t b)
253  {
254  /* This relies on standard semantics for unsigned subtraction to
255  * handle the case where b < a. */
256  return counter_mask & (b - a);
257  }
258 
260  uint32_t counter () const
261  {
262  return rtc_->COUNTER;
263  }
264 
273  static RTC& instance (int idx);
274 
277  const nrf5::RTC_Type& peripheral () const
278  {
279  return rtc_;
280  }
281 
283  const unsigned int ccr_count () const
284  {
285  return rtc_.AUX;
286  }
287 
288 private:
289  const nrf5::RTC_Type& rtc_;
290 };
291 
301 class TIMER
302 {
303 protected:
304  constexpr TIMER (const nrf5::TIMER_Type& timer) :
305  timer_{timer},
306  mask_{}
307  { }
308 
310  void capture_ (unsigned int ccidx) const
311  {
312  timer_->TASKS_CAPTURE[ccidx] = 1;
313  }
314 
316  unsigned int captured_ (unsigned int ccidx) const
317  {
318  return timer_->CC[ccidx];
319  }
320 
322  unsigned int counter_ (unsigned int ccidx) const
323  {
324  capture_(ccidx);
325  return captured_(ccidx);
326  }
327 
328 public:
334  constexpr static unsigned int cc_mask = 7;
335 
341  constexpr static bool bitmode_supported (const nrf5::TIMER_Type& timer,
342  unsigned int bitmode)
343  {
344 #if (NRF51 - 0)
345  /* nRF51 timers 1 and 2 do not support 24- and 32-bit modes */
346  return ((TIMER_BITMODE_BITMODE_24Bit > bitmode)
347  || (0 == timer.INSTANCE));
348 #else /* SERIES */
349  /* All nRF52832 timers support all modes. */
350  return true;
351 #endif /* SERIES */
352  }
353 
381  int configure (unsigned int freq_Hz,
382  unsigned int bitmode = TIMER_BITMODE_BITMODE_16Bit,
383  bool use_constlat = true);
384 
386  void deconfigure ()
387  {
388  (void)configure(0);
389  }
390 
392  unsigned int frequency_Hz () const;
393 
395  void start ()
396  {
397  timer_->TASKS_START = 1;
398  }
399 
401  void clear ()
402  {
403  timer_->TASKS_CLEAR = 1;
404  }
405 
407  void stop ()
408  {
409  timer_->TASKS_STOP = 1;
410  }
411 
413  void shutdown ()
414  {
415  timer_->TASKS_SHUTDOWN = 1;
416  }
417 
425  void capture (unsigned int ccidx) const
426  {
427  capture_(cc_mask & ccidx);
428  }
429 
431  unsigned int captured (unsigned int ccidx) const
432  {
433  return captured_(cc_mask & ccidx);
434  }
435 
444  unsigned int counter (unsigned int ccidx = 0) const
445  {
446  return counter_(cc_mask & ccidx);
447  }
448 
453  unsigned int delta (unsigned int a,
454  unsigned int b) const
455  {
456  return mask_ & (b - a);
457  }
458 
474  {
475  protected:
477  const TIMER& timer_;
479  unsigned int ccidx_;
481  unsigned int capture_;
482 
484  friend class TIMER;
485 
486  timestamp_type (const TIMER& timer,
487  unsigned int ccidx) :
488  timer_{timer},
489  ccidx_{cc_mask & ccidx},
490  capture_{timer.counter(ccidx_)}
491  { }
492 
493  public:
495  unsigned int captured () const
496  {
497  return capture_;
498  }
499 
501  void reset ()
502  {
504  }
505 
507  unsigned int delta () const
508  {
509  auto now = timer_.counter_(ccidx_);
510  return timer_.delta(capture_, now);
511  }
512 
514  unsigned int delta (unsigned int counter) const
515  {
516  return timer_.delta(capture_, counter);
517  }
518 
521  unsigned int delta_reset ()
522  {
523  auto now = timer_.counter_(ccidx_);
524  auto rv = timer_.delta(capture_, now);
525  capture_ = now;
526  return rv;
527  }
528  };
529 
537  timestamp_type timestamp (unsigned int ccidx = 0) const
538  {
539  return timestamp_type{*this, ccidx};
540  }
541 
549  static TIMER& instance (int idx);
550 
553  const nrf5::TIMER_Type& peripheral () const
554  {
555  return timer_;
556  }
557 
559  const unsigned int ccr_count () const
560  {
561  return timer_.AUX;
562  }
563 
564 private:
565  const nrf5::TIMER_Type& timer_;
566 
567  /* A bit mask isolating a count to the bits of the configured BITMODE */
568  unsigned int mask_;
569 };
570 
571 #ifndef NRFCXX_PERIPH_RNG_BUFFER_SIZE
572 
574 #define NRFCXX_PERIPH_RNG_BUFFER_SIZE 8
575 #endif /* NRFCXX_PERIPH_RNG_BUFFER_SIZE */
576 
583 class RNG
584 {
585 public:
596  static void* fill (void* dest,
597  size_t count);
598 
605  template <typename T,
606  typename = std::enable_if<std::is_integral<T>::value>>
607  static T generate ()
608  {
609  union {
610  T v;
611  uint8_t u8[sizeof(T)];
612  } u;
613  fill(u.u8, sizeof(u.u8));
614  return u.v;
615  }
616 };
617 
639 class GPIOTE
640 {
641  /* Record which instances are in use. An 8-bit map is sufficient
642  * for nRF51 and nrf52832/840. */
643  using registry_type = uint8_t;
644 
645 public:
647  using event_reference_type = __O uint32_t &;
648 
650  using task_reference_type = __IO uint32_t &;
651 
655  constexpr static size_t CHANNEL_COUNT = nrf5::GPIOTE.AUX;
656 
658  const uint8_t channel;
659 
668  using event_callback_bi = std::function<void(GPIOTE& instance)>;
669 
673  {
676  int8_t psel;
677 
686  uint8_t counter_state;
687 
696  unsigned int aggregate_state (unsigned int previous = 0) const
697  {
698  return counter_state + (previous & ~1U);
699  }
700  };
701 
729  using sense_callback_bi = std::function<void(const sense_status_type* sp)>;
730 
731  /* You can't copy, assign, move, or otherwise change the set of
732  * GPIOTE instances that the system provides to you. */
733  GPIOTE () = delete;
734  GPIOTE (const GPIOTE&) = delete;
735  GPIOTE& operator= (const GPIOTE&) = delete;
736  GPIOTE (const GPIOTE&&) = delete;
737  GPIOTE& operator= (GPIOTE&&) = delete;
738 
742 
749  static void synchronize_sense ();
750 
767  {
768  public:
771 
784  instance_{}
785  { }
786 
789  {
790  disable();
791  }
792 
803  void enable (GPIOTE& instance);
804 
807  void disable ()
808  {
809  mutex_type mutex;
810  disable_bi_();
811  }
812 
814  /* You can't copy, assign, move, or otherwise muck with event
815  * listeners, since they participate in a reference maintained by
816  * the @link GPIOTE@endlink module. */
817  event_listener (const event_listener&) = delete;
818  event_listener& operator= (const event_listener&) = delete;
819  event_listener (const event_listener&&) = delete;
820  event_listener& operator= (event_listener&&) = delete;
825 
826  private:
827  friend GPIOTE;
828 
829  /* Dissociate this listener from its GPIOTE instance, if any. */
830  void disable_bi_ ()
831  {
832  if (instance_) {
833  instance_->listener_ = nullptr;
834  }
835  instance_ = nullptr;
836  }
837 
843  GPIOTE* instance_;
844  };
845 
855  {
856  struct ref_next
857  {
858  using pointer_type = sense_listener *;
859  pointer_type& operator() (sense_listener& sl) noexcept
860  {
861  return sl.next_;
862  }
863  };
864 
865  public:
866  using chain_type = pabigot::container::forward_chain<sense_listener, ref_next>;
867 
870 
880  next_{}
881  { }
882 
888  {
889  disable();
890  }
891 
893  /* You can't copy, assign, move, or otherwise muck with sense
894  * listeners, since they participate in a linked list maintained
895  * by the @link GPIOTE@endlink module. */
896  sense_listener (const sense_listener&) = delete;
897  sense_listener& operator= (const sense_listener&) = delete;
898  sense_listener (const sense_listener&&) = delete;
899  sense_listener& operator= (sense_listener&&) = delete;
914  void enable ();
915 
925  void disable ();
926 
929 
930  protected:
931  friend GPIOTE;
932 
934  chain_type::pointer_type next_ = chain_type::unlinked_ptr();
935  };
936 
941  static GPIOTE* allocate ();
942 
955  void release ();
956 
976  void config_event (unsigned int psel,
977  unsigned int polarity = GPIOTE_CONFIG_POLARITY_Toggle)
978  {
979  nrf5::GPIOTE->CONFIG[channel] = (GPIOTE_CONFIG_MODE_Event << GPIOTE_CONFIG_MODE_Pos)
980  | (GPIOTE_CONFIG_PSEL_Msk & (psel << GPIOTE_CONFIG_PSEL_Pos))
981  | (GPIOTE_CONFIG_POLARITY_Msk & (polarity << GPIOTE_CONFIG_POLARITY_Pos));
982  }
983 
996  void config_task (unsigned int psel,
997  unsigned int polarity = GPIOTE_CONFIG_POLARITY_Toggle)
998  {
999  nrf5::GPIOTE->CONFIG[channel] = (GPIOTE_CONFIG_MODE_Task << GPIOTE_CONFIG_MODE_Pos)
1000  | (GPIOTE_CONFIG_PSEL_Msk & (psel << GPIOTE_CONFIG_PSEL_Pos))
1001  | (GPIOTE_CONFIG_POLARITY_Msk & (polarity << GPIOTE_CONFIG_POLARITY_Pos));
1002  }
1003 
1011  {
1012  nrf5::GPIOTE->CONFIG[channel] = 0;
1013  }
1014 
1048  {
1049  nrf5::GPIOTE->EVENTS_IN[channel] = 0;
1050  nrf5::GPIOTE->INTENSET = (GPIOTE_INTENSET_IN0_Enabled << (GPIOTE_INTENSET_IN0_Pos + channel));
1051  }
1052 
1062  {
1063  nrf5::GPIOTE->INTENCLR = (GPIOTE_INTENCLR_IN0_Clear << (GPIOTE_INTENCLR_IN0_Pos + channel));
1064  }
1065 
1068 
1071 
1072 #if !(NRF51 - 0)
1073 
1077 
1082 #endif /* !NRF51 */
1083 
1125  static void enable_sense ();
1126 
1129  static void disable_sense ()
1130  {
1131  nrf5::GPIOTE->INTENCLR = (GPIOTE_INTENCLR_PORT_Clear << GPIOTE_INTENCLR_PORT_Pos);
1132  }
1133 
1153  static void irq_handler (void);
1154 
1155 private:
1156  /* The constructor is only invoked through the static initializer
1157  * for instances_. */
1158  constexpr GPIOTE (uint8_t channel_) :
1159  channel{channel_},
1160  listener_{}
1161  { }
1162 
1163  void config_disabled_bi_ ()
1164  {
1165  auto listener = listener_;
1166  if (listener) {
1167  listener->disable_bi_();
1168  }
1169  }
1170 
1171  event_listener * volatile listener_;
1172 
1173  static sense_listener::chain_type sense_chain_;
1174  static GPIOTE instances_[CHANNEL_COUNT];
1175  static registry_type in_use_;
1176 }; // class GPIOTE
1177 
1184 class PPI
1185 {
1186 public:
1188  using event_reference_type = __O uint32_t &;
1189 
1191  using task_reference_type = __IO uint32_t &;
1192 
1196  static int request ();
1197 
1201  static int release (int ppi);
1202 
1206  static int group_request ();
1207 
1211  static int group_release (int ppi);
1212 
1222  static uint32_t configure (int ppidx,
1224  task_reference_type tep)
1225  {
1226  return configure_(ppidx, eep, tep);
1227  }
1228 
1230  static uint32_t CHENSET (uint32_t v)
1231  {
1232  return CHENSET_(v);
1233  }
1234 
1236  static uint32_t CHENCLR (uint32_t v)
1237  {
1238  return CHENCLR_(v);
1239  }
1240 
1242  static uint32_t CHEN ()
1243  {
1244  return CHEN_();
1245  }
1246 
1247 protected:
1248  static uint32_t CHENSET_ (uint32_t v)
1249  {
1250  nrf5::PPI->CHENSET = v;
1251  return 0;
1252  }
1253 
1254  static uint32_t CHENCLR_ (uint32_t v)
1255  {
1256  nrf5::PPI->CHENCLR = v;
1257  return 0;
1258  }
1259 
1260  static uint32_t CHEN_ ()
1261  {
1262  return nrf5::PPI->CHEN;
1263  }
1264 
1265  static uint32_t configure_ (int ppidx,
1267  task_reference_type tep)
1268  {
1269  nrf5::PPI->CH[ppidx].EEP = reinterpret_cast<uintptr_t>(&eep);
1270  nrf5::PPI->CH[ppidx].TEP = reinterpret_cast<uintptr_t>(&tep);
1271  return 0;
1272  }
1273 };
1274 
1285 {
1286 public:
1287 
1296  instr_psel_gpiote (unsigned int psel,
1298  bool enable = true) :
1299  gpiote_{GPIOTE::allocate()},
1300  eep_{eep},
1301  psel_(psel),
1302  ppi_idx_(PPI::request())
1303  {
1304  if (gpiote_ && (0 > ppi_idx_)) {
1305  gpiote_->release();
1306  gpiote_ = nullptr;
1307  } else if ((!gpiote_) && (0 <= ppi_idx_)) {
1308  PPI::release(ppi_idx_);
1309  ppi_idx_ = -1;
1310  } else if (enable) {
1311  this->enable();
1312  }
1313  }
1314 
1315  instr_psel_gpiote () = delete;
1316  instr_psel_gpiote (const instr_psel_gpiote&) = delete;
1317  instr_psel_gpiote& operator= (const instr_psel_gpiote&) = delete;
1318  instr_psel_gpiote (instr_psel_gpiote&&) = delete;
1319  instr_psel_gpiote& operator= (instr_psel_gpiote&&) = delete;
1320 
1321  ~instr_psel_gpiote ()
1322  {
1323  if (0 <= ppi_idx_) {
1324  PPI::CHENCLR(1U << ppi_idx_);
1325  PPI::release(ppi_idx_);
1326  gpiote_->release();
1327  }
1328  }
1329 
1332  operator bool () const
1333  {
1334  return gpiote_;
1335  }
1336 
1338  void enable ()
1339  {
1340  if (gpiote_) {
1341  gpiote_->config_task(psel_);
1342  PPI::configure(ppi_idx_, eep_, gpiote_->TASKS_OUT());
1343  PPI::CHENSET(1U << ppi_idx_);
1344  }
1345  }
1346 
1348  void disable ()
1349  {
1350  if (gpiote_) {
1351  PPI::CHENCLR(1U << ppi_idx_);
1352  gpiote_->config_disabled();
1353  }
1354  }
1355 
1356 private:
1357  GPIOTE* gpiote_;
1359  uint16_t psel_;
1360  int8_t ppi_idx_;
1361 };
1362 
1363 namespace details {
1364 
1370 {
1371 public:
1372 
1374  using size_type = unsigned int;
1375 
1380  using ssize_type = int;
1381 
1394  using error_type = unsigned int;
1395 
1398  constexpr static unsigned int ERR_OVERRUN = 0x001;
1399 
1402  constexpr static unsigned int ERR_ANACK = 0x002;
1403 
1406  constexpr static unsigned int ERR_DNACK = 0x004;
1407 
1410  constexpr static unsigned int ERR_TIMEOUT = 0x100;
1411 
1414  constexpr static unsigned int ERR_CLEAR = 0x200;
1415 
1418  constexpr static unsigned int ERR_INVALID = 0x400;
1419 
1425  constexpr static unsigned int ERR_CHECKSUM = 0x800;
1426 
1429  constexpr static unsigned int ERR_UNKNOWN = 0x1000;
1430 
1438  constexpr static error_type
1440  {
1441  return (0 <= rc) ? 0 : (static_cast<unsigned int>(-rc) - 1);
1442  }
1443 
1448  constexpr static ssize_type
1450  {
1451  return ec ? -(1 + ec) : 0;
1452  }
1453 };
1454 
1467 template <typename PERIPH>
1469 {
1470  using ssize_type = typename PERIPH::ssize_type;
1471 
1472  scoped_enabler (const scoped_enabler&) = delete;
1473  scoped_enabler& operator= (const scoped_enabler&) = delete;
1474  scoped_enabler (scoped_enabler&&) = delete;
1475  scoped_enabler& operator= (scoped_enabler&&) = delete;
1476 
1477 public:
1478  ~scoped_enabler () noexcept
1479  {
1480  if (0 < result_) {
1481  periph.disable();
1482  }
1483  }
1484 
1486  operator bool() const
1487  {
1488  return (0 <= result_);
1489  }
1490 
1496  ssize_type result () const
1497  {
1498  return result_;
1499  }
1500 
1501 private:
1502  friend PERIPH;
1503 
1504  scoped_enabler (PERIPH& periph) :
1505  periph{periph}
1506  {
1507  if (!periph.enabled()) {
1508  result_ = periph.enable();
1509  if (0 <= result_) {
1510  result_ = 1;
1511  }
1512  }
1513  }
1514 
1515  PERIPH& periph;
1516  ssize_type result_ = 0;
1517 };
1518 
1519 } // ns details
1520 
1529 {
1530 public:
1532  constexpr static unsigned int minimum_timeout_us = 100;
1533 
1536  {
1537  return twi_;
1538  }
1539 
1541  bool enabled () const
1542  {
1543  return ((TWI_ENABLE_ENABLE_Enabled << TWI_ENABLE_ENABLE_Pos)
1544  == (TWI_ENABLE_ENABLE_Msk & twi_->ENABLE));
1545  }
1546 
1549 
1564  {
1565  return {*this};
1566  }
1567 
1591  ssize_type bus_configure (int psel_scl,
1592  int psel_sda,
1593  uint32_t frequency,
1594  unsigned int timeout_us);
1595 
1603  {
1604  return error_encoded(set_enabled_(true));
1605  }
1606 
1608  void disable ()
1609  {
1610  set_enabled_(false);
1611  }
1612 
1623  ssize_type read (unsigned int addr,
1624  uint8_t* buf,
1625  size_type count);
1626 
1639  ssize_type write (unsigned int addr,
1640  const uint8_t* buf,
1641  size_type count);
1642 
1659  ssize_type write_read (unsigned int addr,
1660  const uint8_t* sbuf,
1661  size_type scount,
1662  uint8_t* dbuf,
1663  size_type dcount)
1664  {
1665  int rv = 0;
1666  if (0 < scount) {
1667  rv = write(addr, sbuf, scount);
1668  }
1669  if (0 <= rv) {
1670  rv = read(addr, dbuf, dcount);
1671  }
1672  return rv;
1673  }
1674 
1682  static TWI& instance (int idx);
1683 
1684 protected:
1685 
1686  constexpr TWI (const nrf5::TWI_Type& twi) :
1687  twi_{twi},
1688  configuration_{}
1689  { }
1690 
1692  {
1695  unsigned int timeout = 0;
1696 
1699  uint32_t frequency = 0;
1700 
1702  int8_t psel_scl = -1;
1703 
1705  int8_t psel_sda = -1;
1706 
1708  int8_t ppidx = -1;
1709  };
1710 
1711  error_type set_enabled_ (bool enabled);
1712 
1721 
1729 
1735 
1736  const nrf5::TWI_Type& twi_;
1737  configuration_type configuration_;
1738 };
1739 
1749 {
1750 public:
1751 
1753  using size_type = unsigned int;
1754 
1759  using ssize_type = int;
1760 
1763  {
1764  return spi_;
1765  }
1766 
1768  bool enabled () const
1769  {
1770  return ((SPI_ENABLE_ENABLE_Enabled << SPI_ENABLE_ENABLE_Pos)
1771  == (SPI_ENABLE_ENABLE_Msk & spi_->ENABLE));
1772  }
1773 
1776 
1792  {
1793  return {*this};
1794  }
1795 
1818  ssize_type bus_configure (int psel_sck,
1819  int psel_mosi,
1820  int psel_miso,
1821  uint32_t frequency,
1822  uint32_t config);
1823 
1836  static constexpr uint32_t frequency_from_Hz (unsigned int freq_Hz)
1837  {
1838  unsigned int multiplier = 125000;
1839  uint32_t rv = SPI_FREQUENCY_FREQUENCY_K125;
1840  while (true) {
1841  multiplier *= 2;
1842  if ((multiplier > freq_Hz)
1843  || (SPI_FREQUENCY_FREQUENCY_M8 == rv)) {
1844  break;
1845  }
1846  rv <<= 1;
1847  }
1848  return rv;
1849  }
1850 
1860  static constexpr uint32_t config_from_mode (uint8_t mode,
1861  bool lsb_first = false)
1862  {
1863 
1864  return ((lsb_first?1:0) << SPI_CONFIG_ORDER_Pos)
1865  | ((mode & 3) << SPI_CONFIG_CPHA_Pos);
1866  }
1867 
1875  {
1876  return set_enabled_(true);
1877  }
1878 
1880  void disable ()
1881  {
1882  set_enabled_(false);
1883  }
1884 
1912  ssize_type tx_rx (const uint8_t* tx_data,
1913  size_type tx_len,
1914  size_type rx_len,
1915  uint8_t* rx_data,
1916  uint8_t tx_dummy = 0);
1917 
1925  static SPI& instance (int idx);
1926 
1927 protected:
1928 
1929  constexpr SPI (const nrf5::SPI_Type& spi) :
1930  spi_{spi},
1931  configuration_{}
1932  { }
1933 
1935  {
1936  uint32_t frequency = 0;
1937  uint32_t config = 0;
1938  int8_t psel_sck = -1;
1939  int8_t psel_mosi = -1;
1940  int8_t psel_miso = -1;
1941  int8_t ppidx = -1;
1942  };
1943 
1944  error_type set_enabled_ (bool enabled);
1945 
1946  const nrf5::SPI_Type& spi_;
1947  configuration_type configuration_;
1948 };
1949 
1950 // Forward declaration
1951 class ADCClient;
1952 
1988 {
1989 public:
1992 
1994  static constexpr auto& INSTANCE{
1995 #if (NRF51 - 0)
1996  nrf5::ADC
1997 #elif (NRF52832 - 0) || (NRF52840 - 0)
1998  nrf5::SAADC
1999 #endif
2000  };
2001 
2006  using peripheral::busy;
2007 
2009  enum class state_type : uint8_t
2010  {
2015  available,
2016 
2028  claimed,
2029 
2034  calibrating,
2035 
2040  starting,
2041 
2046  sampling,
2047 
2053  stopping,
2054  };
2055 
2058  static void irq_handler ();
2059 
2061  static uint8_t state ()
2062  {
2063  return static_cast<uint8_t>(state_);
2064  }
2065 
2066 private:
2067  friend class ADCClient;
2068 
2069  /* Validate authorization to become owner and update state. */
2070  static int claim_bi_ (ADCClient* client);
2071 
2072  /* Validate then release ownership. */
2073  static int release_bi_ (ADCClient* client);
2074 
2075  /* Attempt to transition into calibrating state. */
2076  static int try_calibrate_bi_ (ADCClient* client,
2077  const notifier_type& notify);
2078 
2079  /* Attempt to transition into sampling state. */
2080  static int try_sample_bi_ (ADCClient* client,
2081  const notifier_type& notify);
2082 
2083  /* Notify application of completion of calibration or sampling.
2084  *
2085  * Operation callbacks are invoked for both sampling and
2086  * calibration, but ADCClient notification callbacks are only
2087  * invoked when sampling completes.
2088  *
2089  * @param calibrating `true` iff the operation that completed was
2090  * calibration.*/
2091  static void complete_notify_bi_ (bool calibrating);
2092 
2099  static ADCClient* volatile owner_;
2100 
2103  static notifier_type notify_callback_;
2104 
2105  static state_type volatile state_;
2106 };
2107 
2124 {
2125 public:
2127  using flags_type = unsigned int;
2128 
2138  using queued_callback_type = std::function<void(int rc)>;
2139 
2140 protected:
2143  {
2146 
2149 
2152 
2155  };
2156 
2157 private:
2158  struct ref_next
2159  {
2160  using pointer_type = ADCClient*;
2161  pointer_type& operator() (ADCClient& cl) noexcept
2162  {
2163  return cl.next_;
2164  }
2165  };
2166 
2167  using queue_type = pabigot::container::forward_chain<ADCClient, ref_next>;
2168  static queue_type queue_;
2169 
2170  queue_type::pointer_type next_ = queue_type::unlinked_ptr();
2171  queued_callback_type queued_callback_{};
2172  notifier_type notify_callback_{};
2173 
2174 public:
2175  using peripheral = ADC::peripheral;
2176 
2179 
2181  /* You can default construct ADCClient instances, but you cannot
2182  * copy, assign or move them, since they can be referenced by the
2183  * infrastructure. */
2184  ADCClient () = default;
2185  ADCClient (const ADCClient&) = delete;
2186  ADCClient (const ADCClient&&) = delete;
2187  ADCClient& operator= (const ADCClient&) = delete;
2188  ADCClient& operator= (ADCClient&&) = delete;
2192  virtual ~ADCClient ()
2193  {
2194  release();
2195  }
2196 
2200  int claim ()
2201  {
2202  mutex_type mutex;
2203  return ADC::claim_bi_(this);
2204  }
2205 
2209  int release ()
2210  {
2211  mutex_type mutex;
2212  return ADC::release_bi_(this);
2213  }
2214 
2232  int calibrate (const notifier_type& notify = {})
2233  {
2234  mutex_type mutex;
2235  return ADC::try_calibrate_bi_(this, notify);
2236  }
2237 
2263  virtual int sample_setup ()
2264  {
2265  return 0;
2266  }
2267 
2271  virtual void sample_teardown ()
2272  { }
2273 
2286  int sample (const notifier_type& notify = {})
2287  {
2288  mutex_type mutex;
2289  return sample_bi_(notify);
2290  }
2291 
2334  int queue (const notifier_type& notify,
2335  const queued_callback_type& qnotify = {},
2336  bool calibrate = false);
2337 
2340  int queue (bool calibrate = false)
2341  {
2342  return queue({}, {}, calibrate);
2343  }
2344 
2345 protected:
2346  friend class ADC;
2347 
2355 
2357  int sample_bi_ (const notifier_type& notify)
2358  {
2359  return ADC::try_sample_bi_(this, notify);
2360  }
2361 
2362  static void process_queue_bi_ ();
2363  void complete_queue_bi_ ();
2364 
2377  virtual int configure_bi_ ()
2378  {
2379  return 0;
2380  }
2381 
2394  virtual void complete_bi_ ()
2395  { }
2396 
2412  virtual int nrf51_next_bi_ (size_t ci)
2413  {
2414  return -1;
2415  }
2416 };
2417 
2418 #if (NRF52840 - 0) || (NRFCXX_DOXYGEN - 0)
2419 
2429 class QSPI
2430 {
2431 public:
2435 
2437  using offset_type = unsigned int;
2438 
2440  using size_type = unsigned int;
2441 
2443  using ssize_type = int;
2444 
2446  static constexpr uint8_t SR_WIP = 0x01;
2448  static constexpr uint8_t SR_WEL = 0x02;
2450  static constexpr uint8_t SR_BP0 = 0x04;
2452  static constexpr uint8_t SR_BP1 = 0x08;
2454  static constexpr uint8_t SR_BP2 = 0x10;
2456  static constexpr uint8_t SR_BP3 = 0x20;
2458  static constexpr uint8_t SR_QE = 0x40;
2463  static constexpr uint8_t SR_SWRD = 0x80;
2464 
2477  static constexpr unsigned int convert_us_dpmdur (unsigned int dur_us)
2478  {
2479  return (16U * dur_us + 255U) / 256U;
2480  }
2481 
2488  {
2498  uint32_t ifconfig[2] = {0, 0x40480};
2499 
2501  uint32_t addrconf = 0xB7;
2502 
2504  uint32_t xipoffset = 0;
2505 
2507  int8_t psel_io[4] = {-1, -1, -1, -1};
2508 
2510  int8_t psel_sck = -1;
2511 
2513  int8_t psel_csn = -1;
2514 
2518  uint8_t enter_dpmdur = 0xFFu;
2519 
2523  uint8_t exit_dpmdur = 0xFFu;
2524 
2528  bool drive_high = false;
2529  };
2530 
2532  /* You can't copy, assign, move, or otherwise change the set of
2533  * QSPI instances that the system provides to you. */
2534  QSPI () = delete;
2535  QSPI (const QSPI&) = delete;
2536  QSPI& operator= (const QSPI&) = delete;
2537  QSPI (const QSPI&&) = delete;
2538  QSPI& operator= (QSPI&&) = delete;
2556 
2559  {
2560  return configuration_;
2561  }
2562 
2566  uint8_t latest_sr () const
2567  {
2568  return (QSPI_STATUS_SREG_Msk & nrf5::QSPI->STATUS) >> QSPI_STATUS_SREG_Pos;
2569  }
2570 
2578  int read_sr () const;
2579 
2584  bool is_qspi_available () const
2585  {
2586  return (((QSPI_STATUS_READY_READY << QSPI_STATUS_READY_Pos)
2587  | (QSPI_STATUS_DPM_Disabled << QSPI_STATUS_DPM_Pos))
2588  == ((QSPI_STATUS_READY_Msk | QSPI_STATUS_DPM_Msk)
2589  & nrf5::QSPI->STATUS));
2590  }
2591 
2605  bool is_write_complete (int sr) const
2606  {
2607  bool rv = false;
2608  if (0 <= sr) {
2609  rv = (0 == ((periph::QSPI::SR_WIP | periph::QSPI::SR_WEL) & sr));
2610  }
2611  return rv;
2612  }
2613 
2621  bool is_powerdown () const
2622  {
2623  return (QSPI_STATUS_DPM_Msk & nrf5::QSPI->STATUS);
2624  }
2625 
2630  bool is_ready () const
2631  {
2632  return (QSPI_STATUS_READY_Msk & nrf5::QSPI->STATUS);
2633  }
2634 
2648  ssize_t read (offset_type addr,
2649  void* dest,
2650  size_type count);
2651 
2674  ssize_t write (offset_type addr,
2675  const void* src,
2676  size_type count);
2677 
2682  static constexpr auto ERASE_4_KB = static_cast<uint8_t>(QSPI_ERASE_LEN_LEN_4KB) << QSPI_ERASE_LEN_LEN_Pos;
2683 
2688  static constexpr auto ERASE_64_KB = static_cast<uint8_t>(QSPI_ERASE_LEN_LEN_64KB) << QSPI_ERASE_LEN_LEN_Pos;
2689 
2694  static constexpr auto ERASE_CHIP = static_cast<uint8_t>(QSPI_ERASE_LEN_LEN_All) << QSPI_ERASE_LEN_LEN_Pos;
2695 
2714  int erase (uint8_t type,
2715  offset_type addr = -1);
2716 
2723  unsigned int jedec_id () const
2724  {
2725  return jedec_id_;
2726  }
2727 
2729  static QSPI* owner ()
2730  {
2731  return owner_;
2732  }
2733 
2735  bool is_activated () const
2736  {
2737  return activated_;
2738  }
2739 
2741  bool is_owner () const
2742  {
2743  return this == owner_;
2744  }
2745 
2756  int claim ();
2757 
2768  int release ();
2769 
2777  int activate ();
2778 
2785  int deactivate ();
2786 
2787 private:
2788  /* The QSPI instance that has control of the %QSPI peripheral. */
2789  static QSPI* owner_;
2790 
2791  const configuration_type& configuration_;
2792  unsigned int jedec_id_ = 0;
2793  bool activated_ = false;
2794 };
2795 
2796 #endif /* NRF52840 */
2797 
2798 } // namespace periph
2799 } // namespace nrfcxx
2800 
2801 #endif /* NRFCXX_PERIPH_HPP */
nrfcxx::periph::ADC::state_type::calibrating
ADC is being calibrated via ADCClient::calibrate()
nrfcxx::periph::GPIOTE::mutex_type
mutex_irq< GPIOTE_IRQn > mutex_type
An RAII type for mutex access to state that must be protected from GPIOTE interrupts.
Definition: periph.hpp:741
nrfcxx::periph::ADCClient::nrf51_next_bi_
virtual int nrf51_next_bi_(size_t ci)
Function used to reconfigure ADC for next sample within the collection.
Definition: periph.hpp:2412
nrfcxx::periph::QSPI::ERASE_CHIP
static constexpr auto ERASE_CHIP
Flag value denoting intent to erase the entire chip.
Definition: periph.hpp:2694
nrfcxx::periph::GPIOTE::event_listener
Object used to manage event callbacks.
Definition: periph.hpp:766
nrfcxx::periph::ADCClient::queue
int queue(const notifier_type &notify, const queued_callback_type &qnotify={}, bool calibrate=false)
Queue an operation to be initiated as soon as the ADC becomes available.
nrfcxx::periph::QSPI::erase
int erase(uint8_t type, offset_type addr=-1)
Initiate an erase of a single flash storage item.
nrfcxx::periph::ADCClient::calibrate
int calibrate(const notifier_type &notify={})
Calibrate the ADC.
Definition: periph.hpp:2232
nrfcxx::periph::UART::events
event_set & events()
Reference the UART events.
nrfcxx::periph::GPIOTE::event_callback_bi
std::function< void(GPIOTE &instance)> event_callback_bi
Signature for a event callback.
Definition: periph.hpp:668
nrfcxx::periph::QSPI::configuration_type::addrconf
uint32_t addrconf
The value for the ADDRCONF register.
Definition: periph.hpp:2501
nrfcxx::periph::ADC::state_type::stopping
ADC is in the process of stopping in the final stages of ADCClient::calibrate() or ADCClient::sample(...
nrfcxx::periph::details::comm_error_support::error_decoded
constexpr static error_type error_decoded(ssize_type rc)
Extract an encoded error value from an API return value.
Definition: periph.hpp:1439
nrfcxx::periph::GPIOTE::allocate
static GPIOTE * allocate()
Allocate a GPIOTE instance.
nrfcxx::periph::ADC::peripheral
nrf5::series::ADC_Variant peripheral
The underlying variant traits class.
Definition: periph.hpp:1991
nrfcxx::periph::GPIOTE::TASKS_OUT
task_reference_type TASKS_OUT()
Reference the channel-specific TASKS_OUT register.
nrfcxx::periph::SPI::disable
void disable()
Disable the SPI peripheral.
Definition: periph.hpp:1880
nrfcxx::periph::UART::statistics
statistics_type statistics() const
Get a snapshot of the UART statistics.
nrfcxx::periph::UART::autoenable
bool autoenable(int on)
Query or control whether the UART self-enables for output.
nrfcxx::periph::TIMER::peripheral
const nrf5::TIMER_Type & peripheral() const
Reference the nRF5 TIMER peripheral instance used by the abstraction.
Definition: periph.hpp:553
nrfcxx::periph::TIMER::captured_
unsigned int captured_(unsigned int ccidx) const
Return the captured value in CC ccidx (unvalidated).
Definition: periph.hpp:316
nrfcxx::periph::GPIOTE::CHANNEL_COUNT
constexpr static size_t CHANNEL_COUNT
The number of GPIOTE channels available.
Definition: periph.hpp:655
nrfcxx::periph::TIMER::timestamp_type::ccidx_
unsigned int ccidx_
Validated capture/compare index used for timestamp operations.
Definition: periph.hpp:479
nrfcxx::nrf5::series::ADC_Peripheral
Constants and function specific to the nRF51 ADC peripheral.
Definition: impl.hpp:19
nrfcxx::periph::QSPI::configuration_type::psel_io
int8_t psel_io[4]
Pin selectors for IO0 through IO3.
Definition: periph.hpp:2507
nrfcxx::periph::ADCClient::FL_QUEUED_CALIBRATE
Bit set in flags_ when the client is queued to invoke calibrate().
Definition: periph.hpp:2148
nrfcxx::periph::ADCClient::flags_type
unsigned int flags_type
Type for client-specific flags.
Definition: periph.hpp:2127
nrfcxx::periph::PPI::request
static int request()
Allocate a PPI channel for application use.
nrfcxx::periph::ADC::state_type::starting
ADC is in the process of starting via ADCClient::sample()
nrfcxx::periph::UART::ssize_type
int ssize_type
The type used for transfer sizes or errors (signed)
Definition: periph.hpp:50
nrfcxx::periph::SPI::enable
ssize_type enable()
Enable the SPI peripheral.
Definition: periph.hpp:1874
nrfcxx::periph::details::comm_error_support::ssize_type
int ssize_type
The type used for transfer sizes (non-negative) or errors (negative).
Definition: periph.hpp:1380
nrfcxx::nrf5::series::ADC_Peripheral::busy
static bool busy()
Return true iff the ADC has an in-progress conversion.
Definition: impl.hpp:108
nrfcxx::periph::QSPI::convert_us_dpmdur
static constexpr unsigned int convert_us_dpmdur(unsigned int dur_us)
Convert a duration expressed in microseconds to the units of the DPMDUR register.
Definition: periph.hpp:2477
nrfcxx::periph::UART::fifo_type
pabigot::container::rr_adaptor< uint8_t > fifo_type
The type used for transmission and reception buffers.
Definition: periph.hpp:46
nrfcxx::periph::SPI::configuration_type
Definition: periph.hpp:1934
nrfcxx::periph::QSPI::configuration_type::psel_csn
int8_t psel_csn
Pin selector for CSn.
Definition: periph.hpp:2513
nrfcxx::periph::QSPI::owner
static QSPI * owner()
Get a pointer to the instance that owns the QSPI peripheral.
Definition: periph.hpp:2729
nrfcxx::periph::GPIOTE::sense_callback_bi
std::function< void(const sense_status_type *sp)> sense_callback_bi
Signature for a sense callback.
Definition: periph.hpp:729
nrfcxx::periph::details::comm_error_support::ERR_CLEAR
constexpr static unsigned int ERR_CLEAR
Bit set in an error code when the TWI bus could not be cleared.
Definition: periph.hpp:1414
nrfcxx::periph::ADCClient::sample_teardown
virtual void sample_teardown()
Reverse the effects of sample_setup_().
Definition: periph.hpp:2271
nrfcxx::periph::GPIOTE::irq_handler
static void irq_handler(void)
Implementation for GPIOTE_IRQHandler required by this module.
nrfcxx::periph::SPI::bus_configure
ssize_type bus_configure(int psel_sck, int psel_mosi, int psel_miso, uint32_t frequency, uint32_t config)
Configure the SPI bus.
nrfcxx::periph::UART::statistics_type::rx_break_errors
unsigned int rx_break_errors
The number of break errors detected.
Definition: periph.hpp:66
nrfcxx::periph::SPI::size_type
unsigned int size_type
The type used for transfer sizes (unsigned)
Definition: periph.hpp:1753
nrfcxx::periph::TIMER::timestamp_type::reset
void reset()
Capture the current time.
Definition: periph.hpp:501
nrfcxx::periph::details::comm_error_support::ERR_ANACK
constexpr static unsigned int ERR_ANACK
NRF_TWI_Type::ERRORSRC bit indicating NACK received during address transmission.
Definition: periph.hpp:1402
nrfcxx::periph::instr_psel_gpiote::instr_psel_gpiote
instr_psel_gpiote(unsigned int psel, PPI::event_reference_type eep, bool enable=true)
Construct the instance.
Definition: periph.hpp:1296
nrfcxx::periph::TWI::write_read
ssize_type write_read(unsigned int addr, const uint8_t *sbuf, size_type scount, uint8_t *dbuf, size_type dcount)
Write to then read from an I2C device.
Definition: periph.hpp:1659
nrfcxx::periph::TIMER::timestamp_type::captured
unsigned int captured() const
Return the captured counter.
Definition: periph.hpp:495
nrfcxx::periph::ADCClient::flags_
flags_type flags_
Flags for use by the core infrastructure and client specifications.
Definition: periph.hpp:2354
nrfcxx::periph::TIMER::cc_mask
constexpr static unsigned int cc_mask
Mask to create a valid CC index from a non-negative integer.
Definition: periph.hpp:334
nrfcxx::periph::UART::statistics_type::rx_frame_errors
unsigned int rx_frame_errors
The number of frame errors detected.
Definition: periph.hpp:69
nrfcxx::periph::GPIOTE::sense_listener::sense_listener
sense_listener(sense_callback_bi callback_bi)
Construct a sense listener.
Definition: periph.hpp:878
nrfcxx::periph::ADCClient::configure_bi_
virtual int configure_bi_()
Method to be invoked to configure the ADC for the next collection.
Definition: periph.hpp:2377
nrfcxx::periph::details::comm_error_support::ERR_CHECKSUM
constexpr static unsigned int ERR_CHECKSUM
Bit set in an error code to indicate a checksum error.
Definition: periph.hpp:1425
nrfcxx::periph::SPI
Wrapper around the nRF51 SPI peripheral.
Definition: periph.hpp:1748
nrfcxx::periph::UART::peripheral
const nrf5::UART_Type & peripheral() const
Reference the nRF5 UART peripheral instance used by the abstraction.
Definition: periph.hpp:186
nrfcxx::periph::GPIOTE::sense_listener
Object used to manage sense callbacks.
Definition: periph.hpp:854
nrfcxx::periph::TWI::clear_error_
error_type clear_error_()
Invoked when a read or write operation detects a bus error.
nrfcxx::periph::PPI
Resource allocation manager for PPI module.
Definition: periph.hpp:1184
nrfcxx::periph::TWI::configuration_type::psel_scl
int8_t psel_scl
Pin selector for SCL, or -1 if not known.
Definition: periph.hpp:1702
nrfcxx::periph::details::comm_error_support::size_type
unsigned int size_type
The type used for transfer sizes (unsigned)
Definition: periph.hpp:1374
nrfcxx::periph::ADCClient::sample
int sample(const notifier_type &notify={})
Trigger a client-specific collection.
Definition: periph.hpp:2286
nrfcxx::periph::QSPI::jedec_id
unsigned int jedec_id() const
Return the JEDEC ID cached on the first activation of the instance.
Definition: periph.hpp:2723
nrfcxx::periph::ADCClient::sample_bi_
int sample_bi_(const notifier_type &notify)
Implements sample() given that the mutex is already held.
Definition: periph.hpp:2357
nrfcxx::periph::QSPI::deactivate
int deactivate()
Deactivate the QSPI peripheral.
nrfcxx::periph::ADCClient::complete_bi_
virtual void complete_bi_()
Method invoked when the collection completes.
Definition: periph.hpp:2394
nrfcxx::periph::RTC::counter_mask
constexpr static uint32_t counter_mask
Mask for the 24-bit RTC counter.
Definition: periph.hpp:241
nrfcxx::periph::TIMER::timestamp_type::delta
unsigned int delta(unsigned int counter) const
Return counts between captured counter and counter.
Definition: periph.hpp:514
nrfcxx::periph::GPIOTE
Class supporting GPIO task and event operations.
Definition: periph.hpp:639
nrfcxx::periph::QSPI::is_powerdown
bool is_powerdown() const
Returns the peripheral flag value indicating whether the device is in deep power-down mode.
Definition: periph.hpp:2621
nrfcxx::periph::TIMER::frequency_Hz
unsigned int frequency_Hz() const
Get the configured clock frequency in Hz.
nrfcxx::periph::SPI::ssize_type
int ssize_type
The type used for transfer sizes (non-negative) or errors (negative).
Definition: periph.hpp:1759
nrfcxx::periph::TWI::instance
static TWI & instance(int idx)
Reference the abstraction instance for a specific peripheral instance.
nrfcxx::mutex_irq
nvic_BlockIRQ as a template type.
Definition: core.hpp:497
nrfcxx::periph::GPIOTE::sense_listener::next_
chain_type::pointer_type next_
Pointer used to link this listener into the enabled sense listeners.
Definition: periph.hpp:934
nrfcxx::periph::details::comm_error_support::ERR_TIMEOUT
constexpr static unsigned int ERR_TIMEOUT
Bit set in an error code when the TWI bus transaction timed out.
Definition: periph.hpp:1410
nrfcxx::periph::QSPI::SR_SWRD
static constexpr uint8_t SR_SWRD
Bit flag for status register write protect bit.
Definition: periph.hpp:2463
nrfcxx::periph::TIMER::deconfigure
void deconfigure()
Deconfigure the TIMER.
Definition: periph.hpp:386
nrfcxx::periph::details::comm_error_support::ERR_UNKNOWN
constexpr static unsigned int ERR_UNKNOWN
Bit set in an error code to indicate an undescribable error.
Definition: periph.hpp:1429
nrfcxx::periph::GPIOTE::TASKS_SET
task_reference_type TASKS_SET()
Reference the channel-specific TASKS_SET register.
nrfcxx::periph::TWI
Wrapper around the nRF51 TWI peripheral.
Definition: periph.hpp:1528
nrfcxx::periph::RTC::instance
static RTC & instance(int idx)
Reference the abstraction instance for a specific peripheral instance.
nrfcxx::periph::TIMER::start
void start()
Invoke TASKS_START.
Definition: periph.hpp:395
nrfcxx::periph::UART::size_type
unsigned int size_type
The type used for transfer sizes (unsigned)
Definition: periph.hpp:48
nrfcxx::periph::TIMER::capture_
void capture_(unsigned int ccidx) const
Capture the current counter into CC ccidx (unvalidated).
Definition: periph.hpp:310
nrfcxx::periph::PPI::configure
static uint32_t configure(int ppidx, event_reference_type eep, task_reference_type tep)
Configure a PPI channel.
Definition: periph.hpp:1222
nrfcxx::periph::QSPI::configuration_type::enter_dpmdur
uint8_t enter_dpmdur
The value of the DPMDUR.ENTER field.
Definition: periph.hpp:2518
nrfcxx::periph::ADC::state_type::sampling
ADC is collecting a sample via ADCClient::sample()
nrfcxx::periph::GPIOTE::config_task
void config_task(unsigned int psel, unsigned int polarity=GPIOTE_CONFIG_POLARITY_Toggle)
Configure the instance to change pin level.
Definition: periph.hpp:996
nrfcxx::periph::QSPI::configuration_type::exit_dpmdur
uint8_t exit_dpmdur
The value of the DPMDUR.EXIT field.
Definition: periph.hpp:2523
nrfcxx::periph::PPI::CHENCLR
static uint32_t CHENCLR(uint32_t v)
Abstraction to disable a set of PPI channels.
Definition: periph.hpp:1236
nrfcxx::periph::GPIOTE::disable_event
void disable_event()
Disable event callbacks for this instance.
Definition: periph.hpp:1061
nrfcxx::periph::SPI::config_from_mode
static constexpr uint32_t config_from_mode(uint8_t mode, bool lsb_first=false)
Determine the value for the CONFIG register.
Definition: periph.hpp:1860
nrfcxx::nrf5::peripheral
Capture information about an nRF5 peripheral instance.
Definition: core.hpp:165
nrfcxx::periph::TIMER::bitmode_supported
constexpr static bool bitmode_supported(const nrf5::TIMER_Type &timer, unsigned int bitmode)
Verify a specific timer can support the requested bitmode.
Definition: periph.hpp:341
nrfcxx::periph::GPIOTE::sense_status_type::counter_state
uint8_t counter_state
Pin state and count of confirmed changes.
Definition: periph.hpp:686
nrfcxx::periph::TIMER::timestamp_type::delta
unsigned int delta() const
Return counts since the captured value.
Definition: periph.hpp:507
nrfcxx::periph::GPIOTE::event_listener::disable
void disable()
Dissociate this listener from any instance.
Definition: periph.hpp:807
nrfcxx::periph::GPIOTE::disable_sense
static void disable_sense()
Stop monitoring sense events.
Definition: periph.hpp:1129
nrfcxx::periph::UART::UART0
static UART UART0
A reference to a board-specific standard UART instance.
Definition: periph.hpp:171
nrfcxx::periph::instr_psel_gpiote::disable
void disable()
Disable the link from the event to the GPIO.
Definition: periph.hpp:1348
nrfcxx::periph::TIMER
Wrapper around the nRF5 TIMER peripheral.
Definition: periph.hpp:301
nrfcxx::periph::GPIOTE::event_listener::~event_listener
~event_listener()
Disable listener on destruction.
Definition: periph.hpp:788
nrfcxx::periph::QSPI::is_ready
bool is_ready() const
Returns the isolated peripheral flag value indicating whether the device is ready to receive new task...
Definition: periph.hpp:2630
nrfcxx::periph::details::comm_error_support::ERR_DNACK
constexpr static unsigned int ERR_DNACK
NRF_TWI_Type::ERRORSRC bit indicating NACK received during data transmission.
Definition: periph.hpp:1406
nrfcxx::periph::GPIOTE::release
void release()
Release the instance.
nrfcxx::periph::GPIOTE::event_reference_type
__O uint32_t & event_reference_type
Type for a reference to a peripheral event.
Definition: periph.hpp:647
nrfcxx::periph::TWI::disable
void disable()
Disable the TWI peripheral.
Definition: periph.hpp:1608
nrfcxx::periph::GPIOTE::enable_event
void enable_event()
Enable event callbacks for this instance.
Definition: periph.hpp:1047
nrfcxx::periph::TIMER::ccr_count
const unsigned int ccr_count() const
The number of capture/compare registers on the device.
Definition: periph.hpp:559
nrfcxx::periph::QSPI
Wrapper around the nRF52 QSPI peripheral.
Definition: periph.hpp:2429
nrfcxx::periph::QSPI::write
ssize_t write(offset_type addr, const void *src, size_type count)
Write data to the device at a specified address.
nrfcxx::periph::TIMER::counter
unsigned int counter(unsigned int ccidx=0) const
Read the current timer value.
Definition: periph.hpp:444
nrfcxx::periph::GPIOTE::event_listener::callback_bi
event_callback_bi const callback_bi
The callback invoked from the GPIOTE IRQ handler.
Definition: periph.hpp:824
nrfcxx::periph::TWI::clear_bus_
error_type clear_bus_()
Reset the I2C bus to idle state if a secondary device is holding it active.
nrfcxx::nrf5::peripheral::AUX
const uint8_t AUX
Auxiliary information relevant to the specific peripheral and type.
Definition: core.hpp:245
nrfcxx::periph::QSPI::configuration_type::xipoffset
uint32_t xipoffset
The value for the XIPOFFSET register.
Definition: periph.hpp:2504
nrfcxx::periph::RTC::peripheral
const nrf5::RTC_Type & peripheral() const
Reference the nRF5 RTC peripheral instance used by the abstraction.
Definition: periph.hpp:277
nrfcxx::periph::ADCClient::FL_SUBCLASS_BASE
Base for subclass use of flags_.
Definition: periph.hpp:2154
nrfcxx::periph::QSPI::SR_BP0
static constexpr uint8_t SR_BP0
Bit flag for status register protected area block bit 0.
Definition: periph.hpp:2450
nrfcxx::periph::GPIOTE::sense_listener::callback_bi
sense_callback_bi const callback_bi
The callback invoked from the GPIOTE IRQ handler.
Definition: periph.hpp:928
nrfcxx::periph::UART::EVT_TXDONE
static constexpr event_set::event_type EVT_TXDONE
Event set in events() when transmission completes.
Definition: periph.hpp:154
nrfcxx::periph::details::comm_error_support::error_type
unsigned int error_type
The type used to encode TWI peripheral errors.
Definition: periph.hpp:1394
nrfcxx::periph::UART::disable
void disable()
Disable the UART.
nrfcxx::periph::PPI::CHENSET
static uint32_t CHENSET(uint32_t v)
Abstraction to enable a set of PPI channels.
Definition: periph.hpp:1230
nrfcxx::periph::QSPI::latest_sr
uint8_t latest_sr() const
Return the most recent cached flash device status register value.
Definition: periph.hpp:2566
nrfcxx::periph::QSPI::SR_BP3
static constexpr uint8_t SR_BP3
Bit flag for status register protected area block bit 3.
Definition: periph.hpp:2456
nrfcxx::periph::UART::statistics_type::tx_count
unsigned int tx_count
The number of octets transmitted.
Definition: periph.hpp:56
nrfcxx::periph::QSPI::is_write_complete
bool is_write_complete(int sr) const
Test a status register value for completion of all write activities.
Definition: periph.hpp:2605
nrfcxx::periph::RTC::counter_delta
constexpr static unsigned int counter_delta(uint32_t a, uint32_t b)
Calculate the tick-count between two counter values.
Definition: periph.hpp:251
nrfcxx::periph::ADC::INSTANCE
static constexpr auto & INSTANCE
Reference to the variant-specific instance characteristics.
Definition: periph.hpp:1994
nrfcxx::periph::ADCClient
Base class for a client of ADC.
Definition: periph.hpp:2123
nrfcxx::periph::TIMER::capture
void capture(unsigned int ccidx) const
Capture the current counter using CC ccidx.
Definition: periph.hpp:425
nrfcxx::periph::QSPI::SR_BP1
static constexpr uint8_t SR_BP1
Bit flag for status register protected area block bit 1.
Definition: periph.hpp:2452
nrfcxx::periph::QSPI::configuration_type::ifconfig
uint32_t ifconfig[2]
The values for the IFCONFIG0 and IFCONFIG1 registers.
Definition: periph.hpp:2498
nrfcxx::periph::SPI::peripheral
const nrf5::SPI_Type & peripheral() const
Reference the underlying peripheral.
Definition: periph.hpp:1762
nrfcxx::periph::ADC::state_type::available
ADC is unclaimed.
nrfcxx::periph::QSPI::SR_WIP
static constexpr uint8_t SR_WIP
Bit flag for status register write-in-progress bit.
Definition: periph.hpp:2446
nrfcxx::periph::UART::statistics_type::rx_overrun_errors
unsigned int rx_overrun_errors
The number of overrun errors detected.
Definition: periph.hpp:75
nrfcxx::periph::QSPI::is_owner
bool is_owner() const
Test whether this instance has control of the QSPI peripheral.
Definition: periph.hpp:2741
nrfcxx::periph::TIMER::shutdown
void shutdown()
Invoke TASKS_SHUTDOWN.
Definition: periph.hpp:413
nrfcxx::periph::QSPI::ssize_type
int ssize_type
Signed type holding transfer sizes or error codes.
Definition: periph.hpp:2443
nrfcxx::periph::TWI::configuration_type
Definition: periph.hpp:1691
nrfcxx::periph::GPIOTE::sense_status_type
Structure used to convey information about pin levels to sense_listener callbacks.
Definition: periph.hpp:672
nrfcxx::periph::RTC::counter_modulus
constexpr static uint32_t counter_modulus
Modulus for the 24-bit RTC counter.
Definition: periph.hpp:238
nrfcxx::periph::ADC::state
static uint8_t state()
Return the current ADC state.
Definition: periph.hpp:2061
nrfcxx::periph::RNG
Wrapper around the nRF51 RNG peripheral.
Definition: periph.hpp:583
nrfcxx::periph::UART::statistics_type::rx_count
unsigned int rx_count
The number of octets received.
Definition: periph.hpp:59
nrfcxx::periph::ADCClient::FL_QUEUED_Msk
Mask to isolate queue state flags().
Definition: periph.hpp:2151
nrfcxx::periph::PPI::event_reference_type
__O uint32_t & event_reference_type
Type for a reference to a peripheral event.
Definition: periph.hpp:1188
nrfcxx::periph::UART::enable
void enable(uint32_t cfg_baudrate=UART_BAUDRATE_BAUDRATE_Baud115200, bool hwfc=false)
Enable the UART.
nrfcxx::periph::QSPI::release
int release()
Release the QSPI peripheral if held by this instance.
nrfcxx::periph::TIMER::timestamp_type::timer_
const TIMER & timer_
Reference to timer used for timestamp operations.
Definition: periph.hpp:477
nrfcxx::periph::QSPI::size_type
unsigned int size_type
Unsigned type holding size of transfers.
Definition: periph.hpp:2440
nrfcxx::periph::TIMER::delta
unsigned int delta(unsigned int a, unsigned int b) const
Calculate the count distance from a to b.
Definition: periph.hpp:453
nrfcxx::periph::TWI::read
ssize_type read(unsigned int addr, uint8_t *buf, size_type count)
Read a block of data from an I2C device.
nrfcxx::periph::SPI::instance
static SPI & instance(int idx)
Reference the abstraction instance for a specific peripheral instance.
nrfcxx::periph::QSPI::ERASE_64_KB
static constexpr auto ERASE_64_KB
Flag value denoting intent to erase a single 64 KiBy block.
Definition: periph.hpp:2688
nrfcxx::periph::QSPI::configuration_type::drive_high
bool drive_high
Set to use high drive for the control and IO pins.
Definition: periph.hpp:2528
nrfcxx::periph::instr_psel_gpiote::enable
void enable()
Enable the link from the event to the GPIO.
Definition: periph.hpp:1338
nrfcxx::periph::GPIOTE::channel
const uint8_t channel
The channel index for this GPIOTE instance.
Definition: periph.hpp:658
nrfcxx::periph::TIMER::stop
void stop()
Invoke TASKS_STOP.
Definition: periph.hpp:407
nrfcxx::periph::details::scoped_enabler
RAII instance that ensures the an instance is enabled within a scope.
Definition: periph.hpp:1468
nrfcxx::periph::details::scoped_enabler::result
ssize_type result() const
The result of attempting to enable the peripheral.
Definition: periph.hpp:1496
nrfcxx::periph::QSPI::configuration
const configuration_type & configuration() const
Reference the QSPI configuration provided on construction.
Definition: periph.hpp:2558
nrfcxx::periph::RNG::generate
static T generate()
Generate a random value of the specified type.
Definition: periph.hpp:607
nrfcxx::periph::TIMER::configure
int configure(unsigned int freq_Hz, unsigned int bitmode=TIMER_BITMODE_BITMODE_16Bit, bool use_constlat=true)
Configure the TIMER to run as a timer.
nrfcxx::periph::QSPI::read_sr
int read_sr() const
Read the current device status register value.
nrfcxx::periph::UART::EVT_RXAVAIL
static constexpr event_set::event_type EVT_RXAVAIL
Event set in events() when data is received.
Definition: periph.hpp:144
nrfcxx::periph::details::comm_error_support::ERR_INVALID
constexpr static unsigned int ERR_INVALID
Bit set in an error code to indicate that the bus was not properly configured or a parameter was inva...
Definition: periph.hpp:1418
nrfcxx::periph::TWI::configuration_type::timeout
unsigned int timeout
Maximum duration to wait for a single-byte transaction to complete, in us.
Definition: periph.hpp:1695
impl.hpp
Primary header for nrfcxx implementation dependencies.
nrfcxx::notifier_type
std::function< void()> notifier_type
Type used to hold a notifier.
Definition: core.hpp:514
nrfcxx::periph::TWI::configuration_type::ppidx
int8_t ppidx
PPI index used for PAN 36 workaround, if enabled.
Definition: periph.hpp:1708
nrfcxx::periph::QSPI::offset_type
unsigned int offset_type
Unsigned type specifying flash memory addresses.
Definition: periph.hpp:2437
nrfcxx::periph::UART::enabled
bool enabled(bool live=false) const
Indicate whether UART is enabled.
nrfcxx::periph::details::comm_error_support::error_encoded
constexpr static ssize_type error_encoded(error_type ec)
Pack an error value into a negative return value.
Definition: periph.hpp:1449
nrfcxx::periph::QSPI::read
ssize_t read(offset_type addr, void *dest, size_type count)
Read data from the device at a specified address.
nrfcxx::periph::TWI::enable
ssize_type enable()
Enable the TWI peripheral.
Definition: periph.hpp:1602
nrfcxx::periph::TIMER::timestamp_type::delta_reset
unsigned int delta_reset()
Return counts since the captured time and reset captured counter to current counter.
Definition: periph.hpp:521
nrfcxx::periph::TIMER::captured
unsigned int captured(unsigned int ccidx) const
Return the captured counter in CC ccidx.
Definition: periph.hpp:431
nrfcxx::periph::GPIOTE::sense_status_type::aggregate_state
unsigned int aggregate_state(unsigned int previous=0) const
Update an external aggregate state with new material.
Definition: periph.hpp:696
nrfcxx::periph::GPIOTE::EVENTS_IN
event_reference_type EVENTS_IN()
Reference the channel-specific EVENTS_IN register.
nrfcxx::periph::GPIOTE::config_event
void config_event(unsigned int psel, unsigned int polarity=GPIOTE_CONFIG_POLARITY_Toggle)
Configure the instance to monitor edge events.
Definition: periph.hpp:976
nrfcxx::periph::UART::EVT_ERROR
static constexpr event_set::event_type EVT_ERROR
Event set in events() when an error is detected.
Definition: periph.hpp:160
nrfcxx::periph::UART::statistics_type::rx_parity_errors
unsigned int rx_parity_errors
The number of parity errors detected.
Definition: periph.hpp:72
nrfcxx::periph::ADC::irq_handler
static void irq_handler()
Implementation for ADCSeriesVariant_IRQHandler required by this module.
nrfcxx::periph::GPIOTE::TASKS_CLR
task_reference_type TASKS_CLR()
Reference the channel-specific TASKS_CLR register.
nrfcxx::periph::GPIOTE::event_listener::event_listener
event_listener(event_callback_bi callback_bi)
Construct an event listener.
Definition: periph.hpp:782
nrfcxx::periph::ADCClient::sample_setup
virtual int sample_setup()
Overridable function to set up for an ADC measurement.
Definition: periph.hpp:2263
nrfcxx::periph::ADCClient::flags_e
flags_e
Defined values for flags.
Definition: periph.hpp:2142
nrfcxx::periph::SPI::enabled
bool enabled() const
Return true iff the device is enabled.
Definition: periph.hpp:1768
nrfcxx::periph::TWI::write
ssize_type write(unsigned int addr, const uint8_t *buf, size_type count)
Write a block of data to an I2C device.
nrfcxx::periph::TIMER::counter_
unsigned int counter_(unsigned int ccidx) const
Capture and return the current counter using ccidx (unvalidated).
Definition: periph.hpp:322
nrfcxx::periph::TWI::bus_configure
ssize_type bus_configure(int psel_scl, int psel_sda, uint32_t frequency, unsigned int timeout_us)
Configure the TWI bus.
nrfcxx::periph::SPI::scoped_enable
scoped_enabler scoped_enable() noexcept
Construct an RAII object that controls whether the instance is enabled.
Definition: periph.hpp:1791
nrfcxx::periph::QSPI::activate
int activate()
Activate the QSPI peripheral to interact with this device.
nrfcxx::periph::QSPI::configuration_type::psel_sck
int8_t psel_sck
Pin selector for SCK.
Definition: periph.hpp:2510
nrfcxx::periph::TIMER::timestamp
timestamp_type timestamp(unsigned int ccidx=0) const
Create a timestamp instance using this timer.
Definition: periph.hpp:537
nrfcxx::periph::TWI::scoped_enable
scoped_enabler scoped_enable() noexcept
Construct an RAII object that controls whether the instance is enabled.
Definition: periph.hpp:1563
nrfcxx::periph::GPIOTE::enable_sense
static void enable_sense()
Enable sense callbacks.
nrfcxx::periph::TIMER::timestamp_type::capture_
unsigned int capture_
Captured counter value used for timestamp delta calculations.
Definition: periph.hpp:481
nrfcxx::periph::UART::statistics_type::rx_dropped
unsigned int rx_dropped
The number of received octets dropped due to lack of buffer space.
Definition: periph.hpp:63
nrfcxx::periph::UART::instance
static UART & instance()
Reference the abstraction instance for UART0.
nrfcxx::periph::GPIOTE::event_listener::enable
void enable(GPIOTE &instance)
Associate this listener with a specific instance.
nrfcxx::periph::TWI::peripheral
const nrf5::TWI_Type & peripheral() const
Reference the underlying peripheral.
Definition: periph.hpp:1535
nrfcxx::periph::TWI::minimum_timeout_us
constexpr static unsigned int minimum_timeout_us
The minimum allowed per-byte bus timeout, in microseconds.
Definition: periph.hpp:1532
nrfcxx::event_set::event_type
unsigned int event_type
The type used to represent a (set of) event(s).
Definition: core.hpp:547
nrfcxx::periph::PPI::CHEN
static uint32_t CHEN()
Abstraction to read the set of enabled PPI channels.
Definition: periph.hpp:1242
nrfcxx::periph::ADCClient::queued_callback_type
std::function< void(int rc)> queued_callback_type
Signature for application notification of completed queue operation.
Definition: periph.hpp:2138
nrfcxx::periph::QSPI::is_qspi_available
bool is_qspi_available() const
Determine whether the QSPI peripheral is available for new commands.
Definition: periph.hpp:2584
nrfcxx::periph::GPIOTE::sense_status_type::psel
int8_t psel
The global pin selector index, or a negative value to indicate the end of the sense-enabled pins.
Definition: periph.hpp:676
nrfcxx::periph::UART::irq_handler
void irq_handler()
Implementation for UART#_IRQHandler required by this module.
nrfcxx::periph::PPI::group_request
static int group_request()
Allocate a PPI channel group for application use.
nrfcxx::periph::details::comm_error_support::ERR_OVERRUN
constexpr static unsigned int ERR_OVERRUN
NRF_TWI_Type::ERRORSRC bit indicating incomplete reception at start.
Definition: periph.hpp:1398
nrfcxx::periph::ADCClient::claim
int claim()
Attempt to claim exclusive use of the ADC peripheral.
Definition: periph.hpp:2200
nrfcxx::periph::ADCClient::mutex_type
peripheral::mutex_type mutex_type
Mutex required to inhibit ADC interrupts.
Definition: periph.hpp:2178
nrfcxx::periph::TIMER::clear
void clear()
Invoke TASKS_CLEAR.
Definition: periph.hpp:401
nrfcxx::periph::QSPI::configuration_type
Configuration parameters for QSPI peripheral.
Definition: periph.hpp:2487
nrfcxx::periph::ADCClient::~ADCClient
virtual ~ADCClient()
Release the peripheral when the client is destructed.
Definition: periph.hpp:2192
nrfcxx::periph::ADCClient::release
int release()
Release the ADC peripheral.
Definition: periph.hpp:2209
nrfcxx::periph::TWI::configuration_type::psel_sda
int8_t psel_sda
Pin selector for SDA, or -1 if not known.
Definition: periph.hpp:1705
nrfcxx::periph::GPIOTE::sense_listener::~sense_listener
~sense_listener()
Destruct a sense listener.
Definition: periph.hpp:887
nrfcxx::periph::instr_psel_gpiote
Class supporting GPIO instrumentation triggered by peripheral events.
Definition: periph.hpp:1284
nrfcxx::periph::QSPI::SR_QE
static constexpr uint8_t SR_QE
Bit flag for status register quad-enabled bit.
Definition: periph.hpp:2458
nrfcxx::periph::UART::statistics_type
Statistics on the UART operation.
Definition: periph.hpp:53
nrfcxx::periph::QSPI::claim
int claim()
Attempt to claim use of the QSPI peripheral.
nrfcxx::periph::UART
Wrapper around the nRF51 UART peripheral.
Definition: periph.hpp:42
nrfcxx::periph::ADC::state_type::claimed
ADC is owned by a client but is not started.
nrfcxx::periph::TIMER::timestamp_type
Class supporting (high-resolution) timing.
Definition: periph.hpp:473
nrfcxx::periph::TWI::configuration_type::frequency
uint32_t frequency
Encoded value for FREQUENCY register, e.g.
Definition: periph.hpp:1699
nrfcxx::periph::RTC::counter
uint32_t counter() const
Return the underlying 24-bit counter value.
Definition: periph.hpp:260
nrfcxx::periph::UART::EVT_TXAVAIL
static constexpr event_set::event_type EVT_TXAVAIL
Event set in events() when there is space in the transmit buffer.
Definition: periph.hpp:147
nrfcxx::periph::ADCClient::FL_QUEUED_SAMPLE
Bit set in flags_ when the client is queued to invoke sample().
Definition: periph.hpp:2145
nrfcxx::periph::UART::read
ssize_type read(uint8_t *dp, size_type count)
Read data from the UART.
nrfcxx::periph::PPI::release
static int release(int ppi)
Release a previously allocated PPI channel.
nrfcxx::periph::RTC::ccr_count
const unsigned int ccr_count() const
The number of capture/compare registers on the device.
Definition: periph.hpp:283
nrfcxx::periph::ADC::state_type
state_type
Genericized states of the ADC.
Definition: periph.hpp:2009
nrfcxx::periph::QSPI::QSPI
QSPI(const configuration_type &configuration)
Construct a new QSPI interface.
nrfcxx
Primary namespace for nrfcxx functionality.
Definition: clock.hpp:17
nrfcxx::periph::GPIOTE::synchronize_sense
static void synchronize_sense()
Process as though a PORT event had been received.
nrfcxx::nrf5::peripheral::INSTANCE
const uint8_t INSTANCE
The peripheral instance, for peripherals like TIMER that have multiple instances.
Definition: core.hpp:228
nrfcxx::periph::SPI::tx_rx
ssize_type tx_rx(const uint8_t *tx_data, size_type tx_len, size_type rx_len, uint8_t *rx_data, uint8_t tx_dummy=0)
Transmit and/or receive data over the SPI bus.
nrfcxx::periph::TIMER::instance
static TIMER & instance(int idx)
Reference the abstraction instance for a specific peripheral instance.
nrfcxx::periph::GPIOTE::task_reference_type
__IO uint32_t & task_reference_type
Type for a reference to a peripheral task.
Definition: periph.hpp:650
nrfcxx::periph::QSPI::is_activated
bool is_activated() const
Test whether this instance is already activated.
Definition: periph.hpp:2735
nrfcxx::event_set
A record of events that occur asynchonously.
Definition: core.hpp:541
nrfcxx::periph::SPI::frequency_from_Hz
static constexpr uint32_t frequency_from_Hz(unsigned int freq_Hz)
Calculate the appropriate frequency assignment for a requested rate.
Definition: periph.hpp:1836
nrfcxx::periph::QSPI::ERASE_4_KB
static constexpr auto ERASE_4_KB
Flag value denoting intent to erase a single 4 KiBy sector.
Definition: periph.hpp:2682
nrfcxx::periph::RNG::fill
static void * fill(void *dest, size_t count)
Fill a block of memory with random bytes.
nrfcxx::periph::RTC
Wrapper around the nRF51 RTC peripheral.
Definition: periph.hpp:229
nrfcxx::periph::details::comm_error_support
Abstracted support for error returns.
Definition: periph.hpp:1369
nrfcxx::periph::ADCClient::queue
int queue(bool calibrate=false)
Overload when no notifications are required.
Definition: periph.hpp:2340
nrfcxx::periph::PPI::task_reference_type
__IO uint32_t & task_reference_type
Type for a reference to a peripheral task.
Definition: periph.hpp:1191
nrfcxx::periph::GPIOTE::sense_listener::enable
void enable()
Enable event processing for this instance.
nrfcxx::periph::TWI::reset_periph_
error_type reset_periph_()
Power cycle the peripheral and re-initialize it.
nrfcxx::periph::GPIOTE::config_disabled
void config_disabled()
Deconfigure the instance.
Definition: periph.hpp:1010
nrfcxx::periph::PPI::group_release
static int group_release(int ppi)
Release a previously allocated PPI channel group.
nrfcxx::periph::QSPI::SR_WEL
static constexpr uint8_t SR_WEL
Bit flag for status register write-enable-latch bit.
Definition: periph.hpp:2448
nrfcxx::periph::UART::write
ssize_type write(const uint8_t *sp, size_type count)
Write data to the UART.
nrfcxx::periph::TWI::enabled
bool enabled() const
Return true iff the device is enabled.
Definition: periph.hpp:1541
nrfcxx::periph::GPIOTE::sense_listener::disable
void disable()
Disable event processing for this instance.
nrfcxx::periph::QSPI::SR_BP2
static constexpr uint8_t SR_BP2
Bit flag for status register protected area block bit 2.
Definition: periph.hpp:2454
nrfcxx::periph::ADC
Wrapper around the ADC or SAADC peripheral.
Definition: periph.hpp:1987